Fan-Out Semiconductor Package Support Structure for Warpage Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The miniaturization of semiconductor devices complicates their manufacturing, leading to increased warpage in fan-out packages, which hinders bonding with package substrates and can result in failed solder joints, thereby reducing the reliability of semiconductor structures.

Innovation Solution

Incorporating a support element configured to reduce warpage, which includes a rigid material with adequate mechanical support, such as a dummy support wafer or metal alloy, attached over the molding and die to provide stability and improve bonding reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If miniaturization of semiconductor devices is pursued to increase integration density, then more components can be integrated into a given area, but manufacturing becomes more complicated and difficult, leading to increased warpage and reduced yield

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing complexity
Core Design Contradiction:
Area of moving objectVSEase of manufacture

Solution Approach 1:

The manufacturing process is divided into distinct stages: forming the interconnect structure, depositing the molding compound, and then removing portions of the molding compound to expose conductive bumps. This segmentation allows each step to be optimized independently, managing the complexity of miniaturized device fabrication.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The conductive bumps are formed and positioned on the interconnect structure before the molding compound is removed. This preliminary action ensures that the bonding structures are in place and properly positioned before final packaging operations, reducing manufacturing complexity and improving yield.

Inventive Principle:
Principle #10Preliminary action

2Area of moving object

If miniaturization is pursued to increase integration density, then more components can be integrated into a given area, but warpage increases which hinders bonding with package substrates

Engineering Contradiction:
Improveintegration densityVSAvoidbonding reliability
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The molding compound is selectively removed in specific regions to expose conductive bumps while leaving other regions intact. This local modification allows bonding operations to proceed on exposed bumps while the remaining molding compound provides structural support, reducing warpage and improving bonding reliability in miniaturized packages.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The interconnect structure serves as an intermediary between the conductive bumps and the package substrate. By forming this intermediate layer with controlled properties, the structure accommodates thermal expansion differences and reduces warpage, enabling reliable bonding in miniaturized semiconductor packages.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Area of moving object

If miniaturization is pursued to increase integration density, then more components can be integrated into a given area, but solder joints may fail due to increased warpage

Engineering Contradiction:
Improveintegration densityVSAvoidwarpage
Core Design Contradiction:
Area of moving objectVSObject-affected harmful factors

Solution Approach 1:

Selective removal of molding compound creates localized bonding areas with exposed conductive bumps while maintaining structural integrity in other regions. This local modification reduces overall warpage and prevents solder joint failure in miniaturized packages with high integration density.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The package structure combines multiple materials with different properties: the molding compound provides mechanical support and stress distribution, while the exposed conductive bumps enable reliable solder bonding. This composite approach balances the conflicting requirements of minimizing warpage and enabling reliable solder joints in miniaturized devices.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS12009316B2Semiconductor structure and method of manufacturing a semiconductor structure
Publication Date: 2024.06.11 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12009316B2 patent drawing
  • US12009316B2 patent drawing
  • US12009316B2 patent drawing

AI summary

A semiconductor structure includes a first die having a first surface and a second surface opposite to the first surface, a conductive bump disposed at the first surface, and an RDL under the conductive bump. The RDL includes an interconnect structure and a dielectric layer, and the interconnect structure is electrically connected to the first die through the conductive bump. The semiconductor structure further includes a molding over the RDL and surrounding the first die and the conductive bump, an adhesive over the molding and the second surface, and a support element over the adhesive. A method includes providing a first die having a first surface and a second surface, a redistribution layer over the first surface, and a molding surrounding the first die; removing a portion of the molding to expose the second surface; and attaching a support element over the molding and the second surface.