Fan-Out Package Structure for Shorter IPD Routing Distance

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Solution Overview

Problem

The semiconductor industry faces challenges in integrating high-functional electronic components into small packages while maintaining high performance and low cost, particularly due to the need for miniaturization and efficient electrical routing, where existing packaging technologies struggle to reduce the distance between semiconductor devices and integrated passive devices effectively.

Innovation Solution

A device package structure is formed by creating a redistribution structure over a carrier substrate, attaching an integrated passive device between this structure and an interconnect structure, and then attaching a semiconductor device, which reduces the distance between the semiconductor device and the integrated passive device, thereby improving electrical performance by minimizing routing distance and inductance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If conventional packaging technologies are used, then package size can be reduced, but the distance between semiconductor devices and integrated passive devices cannot be reduced effectively

Engineering Contradiction:
Improvedistance between semiconductor device and integrated passive deviceVSAvoidmanufacturing complexity
Core Design Contradiction:
Length of moving objectVSEase of manufacture

Solution Approach 1:

The patent implements fan-out wiring that extends electrical connections in lateral dimensions beyond the vertical stacking of components. The redistribution layer routes signals outward from the compact vertical arrangement, effectively using planar dimensionality to reduce electrical path length without increasing package footprint or manufacturing complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces a redistribution layer as an intermediary structure between the semiconductor device and integrated passive devices. This intermediate layer provides additional routing paths that shorten the electrical distance between components while maintaining a compact physical layout, resolving the contradiction between component proximity and manufacturing ease

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If more input/output pads are integrated, then functionality increases, but package size increases

Engineering Contradiction:
ImprovefunctionalityVSAvoidpackage size
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The fan-out wiring structure extends electrical connections laterally beyond the vertical footprint of the semiconductor device, allowing multiple I/O pads to be accessed within a compact package area. This dimensional approach enables high functionality without proportionally increasing package size

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The redistribution layer serves multiple functions simultaneously: it provides electrical routing for numerous I/O pads, enables compact packaging, and maintains signal integrity. This multi-functional structure allows high functionality to be achieved without linearly increasing package area

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If routing distance is reduced, then electrical performance improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improveelectrical performanceVSAvoidrouting precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The redistribution layer is formed as a pre-established routing infrastructure before final component placement. This preliminary routing structure provides defined, controlled pathways that reduce electrical distance while maintaining manufacturability through standardized fabrication processes rather than requiring high-precision custom routing

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240379538A1Semiconductor Device and Method of Manufacture
Publication Date: 2024.11.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240379538A1 patent drawing
  • US20240379538A1 patent drawing
  • US20240379538A1 patent drawing

AI summary

A method includes forming a redistribution structure on a carrier, attaching an integrated passive device on a first side of the redistribution structure, attaching an interconnect structure to the first side of the redistribution structure, the integrated passive device interposed between the redistribution structure and the interconnect structure, depositing an underfill material between the interconnect structure and the redistribution structure, and attaching a semiconductor device on a second side of the redistribution structure that is opposite the first side of the redistribution structure.