Fan-Out Package Heat Dissipation Sheet for High Power Density Chips
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Solution Overview
Problem
Conventional chip packaging methods for high power density chips result in large packaging volume, poor heat dissipation, high operating temperatures, and poor reliability, making them unsuitable for integrating chips that cannot withstand high temperatures.
Innovation Solution
A fan-out type package is developed, comprising one or more chips, an adhesive material layer, a heat dissipation sheet, an encapsulation material layer, and a packaging circuit protection layer, where the chip is mounted on the heat dissipation sheet with an adhesive material, and the encapsulation material fills the gap between the heat dissipation sheet and a temporary protection material to form a packaging circuit, enabling effective heat dissipation and electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of stationary object
If conventional chip packaging method is used, then chip can be packaged, but packaging volume is large and heat dissipation is poor
Solution Approach 1:
The patent transitions from conventional two-dimensional packaging to three-dimensional fan-out packaging, where the packaging substrate extends in multiple dimensions to provide both compact volume and enhanced heat dissipation pathways. The packaging substrate serves multiple functions across different spatial dimensions, achieving small volume while maintaining effective heat dissipation.
2Reliability
If conventional chip packaging method is used, then chip can be packaged, but operating temperature is very high
Solution Approach 1:
The patent introduces a packaging substrate as an intermediary component between the chip and the external environment. This substrate provides thermal management pathways and electrical interconnection, acting as a mediator that reduces operating temperature while maintaining device reliability. The substrate's multi-functional design allows it to handle both thermal and electrical aspects simultaneously.
3Loss of energy
If conventional chip packaging method is used, then chip can be packaged, but power loss is large
Solution Approach 1:
The packaging substrate performs multiple functions simultaneously: it provides mechanical support, thermal management, electrical interconnection, and signal routing. This multi-functionality reduces the need for additional separate components, thereby minimizing power loss while maintaining high device reliability through integrated design.
4Ease of manufacture
If conventional chip packaging method is used, then chip can be packaged, but packaging process is complex
Solution Approach 1:
The patent employs preliminary actions in the packaging process, such as pre-forming the packaging substrate with integrated thermal and electrical pathways before chip mounting. This preliminary preparation simplifies subsequent assembly steps while ensuring reliable device performance, as the substrate is already configured to provide both mechanical support and functional pathways.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves heat dissipation performance, reduces power consumption, and enhances the reliability of high power density chips by allowing simultaneous heat dissipation from multiple surfaces and reducing thermal resistance, making it suitable for integrating high power density chips.
Implementation Method 1
a back surface of the chip is mounted at a chip mounting region of the heat dissipation sheet via the adhesive material layer
Implementation Method 2
the heat dissipation sheet has hollowed-out holes that are hollowed out in a thickness direction of the fan-out type package
Implementation Method 3
the encapsulation material layer is formed by making an encapsulation material flow into and fill a gap between the temporary protection material and the heat dissipation sheet
Data Source
AI summary
A fan-out type package and a preparation method of the fan-out type package are provided. The fan-out type package has one or more chips having same or different functions and each having a back surface mounted in a chip mounting region of the heat dissipation sheet via the adhesive material layer, and a front surface covered by a temporary protection material; an adhesive material layer; a heat dissipation sheet; an encapsulation material layer formed by making an encapsulation material flow into and fill a gap between the temporary protection material and the heat dissipation sheet and/or cover a side of the heat dissipation sheet opposite to a side thereof mounted with the chip, and then removing the temporary protection material; a packaging circuit grown on the front surface of the chip, the encapsulation material, and the heat dissipation sheet; and a packaging circuit protection layer protecting the packaging circuit.