Fan-out Semiconductor Package with Integrated Frame and Redistribution Layer
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Solution Overview
Problem
Current semiconductor package technologies, such as fan-in packages, face challenges in accommodating a large number of I/O terminals and compact size requirements, leading to spatial limitations and difficulties in direct mounting on electronic device mainboards, while fan-out packages aim to address these issues by redistributing connection pads outwardly but often require separate BGA substrates, increasing thickness and complexity.
Innovation Solution
A fan-out semiconductor package design featuring a frame with a blind recess portion and a stopper layer, allowing for integrated packaging of semiconductor chips without separate BGA substrates, utilizing redistribution layers and wiring layers to connect pads both within and outside the chip, enabling direct mounting on mainboards and reducing thickness and manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If fan-in package structure is used, then manufacturing process is simple, but spatial limitations occur and direct mounting on mainboard is difficult
Solution Approach 1:
The patent transitions from traditional fan-in packaging to fan-out packaging by redistributing connection pads from the chip surface to the package substrate surface, effectively changing the dimensional arrangement of electrical connections. This allows the package to be mounted directly on mainboards with improved spatial adaptability while maintaining manufacturing feasibility through established PCB fabrication processes.
Solution Approach 2:
The package structure is segmented into distinct functional layers including the substrate, redistribution layers, and encapsulant, allowing independent optimization of each component. The substrate serves as a separate mounting platform that can be directly attached to mainboards, while the chip remains confined to a recessed area, enabling versatile integration options.
2Adaptability or versatility
If separate BGA substrate is used in fan-out package, then I/O terminals can be redistributed outwardly, but package thickness increases and complexity increases
Solution Approach 1:
The patent merges the substrate and package structure into a single integrated component, eliminating the need for separate BGA substrates. The substrate serves dual functions as both the mounting platform for I/O redistribution and the package body, thereby reducing overall structural complexity and thickness while achieving effective pad redistribution.
Solution Approach 2:
The substrate is designed to perform multiple functions simultaneously: it provides mechanical support, enables I/O terminal redistribution through wiring layers, serves as the package body, and offers direct mounting capability on mainboards. This multi-functionality reduces the need for additional components and simplifies the overall package structure.
3Adaptability or versatility
If separate BGA substrate is used, then I/O terminals can be redistributed, but manufacturing cost increases
Solution Approach 1:
By combining the substrate and package into a single integrated structure, the patent eliminates the need for separate BGA substrate manufacturing and assembly processes. This integration reduces material costs, simplifies fabrication steps, and lowers overall manufacturing expenses while maintaining the I/O redistribution functionality through wiring layers formed on the substrate.
4Volume of moving object
If compact size is required, then chip size must be reduced, but heat dissipation becomes more difficult
Solution Approach 1:
The substrate acts as an intermediary thermal management component, providing a large surface area for heat dissipation away from the compact chip. Thermal vias and wiring layers on the substrate conduct heat from the chip to the package exterior, enabling effective thermal management in compact configurations by separating the heat generation source from the dissipation surface.
Data Source
AI summary
A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; a first encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; an electronic component disposed on the other surface of the frame opposing one surface of the frame in which the semiconductor chip is disposed; a second encapsulant covering at least portions of the electronic component; and a connection member disposed on the frame and an active surface of the semiconductor chip and including a redistribution layer, wherein the connection pads and the electronic component are electrically connected to each other through the wiring layers and the redistribution layer.


