Fan-out semiconductor package circuit density
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Solution Overview
Problem
Current fan-in semiconductor packages face challenges in increasing circuit density in limited areas due to spatial limitations and difficulties in mounting semiconductor chips with a large number of I/O terminals or compact sizes directly on main boards, requiring interposer substrates for redistribution.
Innovation Solution
A fan-out semiconductor package design that uses interconnection members to connect semiconductor chip connection pads to a redistribution layer, allowing for increased circuit density by redistributing I/O terminals outwardly, eliminating the need for interposer substrates and enabling direct mounting on main boards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If fan-in semiconductor package structure is used, then mounting is straightforward, but circuit density is limited and interposer substrates are required for redistribution
Solution Approach 1:
The patent transitions from fan-in configuration where connection pads are distributed within the chip footprint to fan-out configuration where connection pads are redistributed outwardly beyond the chip edges. This dimensional redistribution enables higher circuit density by utilizing the area surrounding the chip rather than being constrained to the chip surface area.
Solution Approach 2:
The package structure is segmented into distinct functional layers: semiconductor chip, encapsulant, insulating layer, and redistribution layer. This segmentation allows independent optimization of each layer, enabling the redistribution layer to extend outwardly from the chip area to achieve higher circuit density without complicating the chip itself.
2Quantity of substance
If connection pads are redistributed outwardly to increase circuit density, then more I/O terminals can be accommodated, but bonding interface area is reduced
Solution Approach 1:
The patent applies different quality requirements to different regions: the bonding interface region maintains sufficient area for reliable electrical connection, while the redistribution layer extends outwardly in non-bonding regions to accommodate additional I/O terminals. This local differentiation allows increased I/O count without compromising bonding reliability.
Solution Approach 2:
The insulating layer acts as an intermediary between the semiconductor chip and the redistribution layer. It provides electrical isolation and mechanical support, enabling the redistribution layer to extend outwardly with adequate bonding interface area maintained at the chip level while accommodating additional I/O terminals in the extended region.
3Quantity of substance
If interconnection members are used to connect chip pads to redistribution layer, then circuit density increases, but manufacturing precision requirements increase
Solution Approach 1:
The interconnection members are attached directly to the connection pads on the semiconductor chip in a self-aligning manner. This self-service approach reduces the need for high-precision external alignment processes, as the interconnection members naturally position themselves relative to the chip pads during attachment, thereby reducing manufacturing precision requirements while enabling circuit redistribution.
4Productivity
If fan-out package structure is used, then circuit density and integration efficiency improve, but new manufacturing processes are required
Solution Approach 1:
The insulating layer is formed and planarized before the redistribution layer is created. This preliminary action establishes a stable foundation that simplifies subsequent redistribution layer fabrication. The pre-formed insulating layer with embedded interconnection members provides a ready-made structure that reduces the complexity of later manufacturing steps, thereby improving integration efficiency without excessively complicating the overall manufacturing process.
Data Source
AI summary
The present disclosure relates to a semiconductor package, and more particularly, to a fan-out semiconductor package in which connection terminals may extend outwardly of a region in which a semiconductor chip is disposed. In the fan-out semiconductor package, a circuit density of a redistribution layer may be increased even in a limited area.