Fan-Out Semiconductor Package Meandering Pathway Thermal Stress
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional fan-in semiconductor packages face challenges in accommodating a large number of I/O terminals and compact size requirements, leading to spatial limitations and difficulties in direct mounting on electronic device main boards, while fan-out packages aim to address these issues by redistributing connection pads outwardly, but face stress-related reliability concerns due to thermal expansion and contraction.
Innovation Solution
A fan-out semiconductor package design that includes a first interconnection member with a through-hole, a semiconductor chip, an encapsulant, and a second interconnection member with redistribution layers, where connection pads are electrically connected to connection terminals through a meandering electrical pathway to offset stress, improving board level reliability by dispersing thermal stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If connection terminals are redistributed outwardly to increase I/O capacity, then the number of pins increases, but thermal stress concentration worsens
Solution Approach 1:
The electrical pathway is designed with a meandering (curved) configuration instead of a straight line. This curved pathway allows stress to be distributed along the length of the meander, reducing stress concentration at any single point while maintaining electrical connectivity between the connection pad and terminal.
Solution Approach 2:
The electrical pathway extends in multiple directions rather than following a direct linear path. By utilizing lateral space and creating a multi-dimensional routing pattern, the pathway increases its length and stress-dissipating capacity without significantly increasing the overall package footprint.
2Volume of moving object
If semiconductor chip size is reduced to meet compact requirements, then package size decreases, but spatial limitations for mounting worsen
Solution Approach 1:
The connection terminals are positioned in a fan-out configuration that extends laterally beyond the chip boundaries. This two-dimensional expansion of terminal placement allows direct mounting on main boards without requiring intermediate interposer substrates, enabling compact chip design while maintaining mounting flexibility.
Solution Approach 2:
The meandering electrical pathway acts as an intermediary structure that connects the small chip to the larger board environment. It provides mechanical compliance and stress relief, allowing the compact chip to be mounted directly on boards without rigid direct connections that would constrain the chip or damage it during thermal cycling.
3Device complexity
If direct mounting on main board is implemented, then device complexity decreases, but stress transfer increases
Solution Approach 1:
The meandering pathway introduces geometric curvature into the stress transmission path. This curved configuration naturally distributes mechanical stress along multiple segments rather than transmitting it directly, reducing the stress load on the chip and solder joints while enabling direct mounting.
Solution Approach 2:
The meandering electrical pathway functions as a flexible stress-compliant structure. Its extended, curved geometry provides mechanical compliance that absorbs thermal expansion and contraction forces, protecting the rigid chip and solder connections from stress damage while maintaining electrical functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances the reliability of the fan-out semiconductor package by effectively dispersing thermal stress, reducing the risk of defects and improving connectivity between connection pads and terminals, allowing for more robust and reliable mounting on electronic device main boards without the need for separate interposer substrates.
Implementation Method 1
stress transferred from the connection terminal to be offset in a process in which the stress passes through the meandering electrical pathway
Data Source
AI summary
A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole of the first interconnection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the semiconductor chip; a second interconnection member disposed on the first interconnection member and the semiconductor chip; and connection terminals disposed on the second interconnection member. The first interconnection member and the second interconnection member respectively include redistribution layers electrically connected to the connection pads of the semiconductor chip, and a connection pad and a connection terminal are electrically connected to each other by a pathway passing through the redistribution layer of the first interconnection member.