Fan-Out Semiconductor Package Module with Redistribution Layer

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Solution Overview

Problem

Conventional semiconductor packaging methods, such as chip on board (COB), require large mounting areas due to the need for wide spacing between components, leading to increased electromagnetic interference (EMI) and electrical noise, and are inefficient in reducing component size and electrical path length.

Innovation Solution

A fan-out semiconductor package module is proposed, where multiple passive components and a semiconductor chip are mounted in a single package with a core member and encapsulated in two steps, using a redistribution layer to connect the chip and passive components, reducing the electrical path length and improving EMI shielding and heat dissipation through plating.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If chip on board (COB) technique is used to mount components on PCB, then cost is reduced, but mounting area increases and electromagnetic interference increases

Engineering Contradiction:
ImprovecostVSAvoidmounting area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent merges multiple discrete components (semiconductor chip, passive components, and PCB) into a single integrated module. The semiconductor chip and passive components are mounted on a substrate and encapsulated together to form one compact module, eliminating the need for separate PCB mounting and reducing overall mounting area while maintaining cost-effectiveness through integrated manufacturing

Inventive Principle:
Principle #5Merging (Combining)

2Ease of manufacture

If chip on board (COB) technique is used to mount components on PCB, then cost is reduced, but electromagnetic interference increases

Engineering Contradiction:
ImprovecostVSAvoidelectromagnetic interference
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

By integrating the semiconductor chip, passive components, and interconnections into a single encapsulated module, the patent reduces the electrical path lengths between components. This integration minimizes electromagnetic interference while maintaining cost-effectiveness through unified manufacturing processes

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If conventional packaging is used, then manufacturing is simple, but electrical path length between semiconductor chip and passive components increases

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidelectrical path length
Core Design Contradiction:
Ease of manufactureVSLength of stationary object

Solution Approach 1:

The patent transitions from conventional two-dimensional PCB mounting to a three-dimensional integrated structure where the semiconductor chip and passive components are mounted on a substrate and encapsulated together. This vertical integration dramatically reduces electrical path lengths while maintaining manufacturing feasibility through established encapsulation processes

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces the mounting area and electrical path length between the semiconductor chip and passive components, enhances EMI shielding, and improves heat dissipation, while maintaining high production yield and allowing for compact, efficient semiconductor packaging.

Implementation Method 1

an improved electromagnetic interference (EMI) shielding and heat dissipation effect using plating or the like

Methodology Applied
Scientific EffectPlating: Electroplating

Data Source

PatentUS10242973B2Fan-out-semiconductor package module
Publication Date: 2019.03.26 SAMSUNG ELECTRONICS CO LTD
  • US10242973B2 patent drawing
  • US10242973B2 patent drawing
  • US10242973B2 patent drawing

AI summary

A fan-out semiconductor package module includes: a core member having a first through hole and a second through hole; a semiconductor chip disposed in the first through hole, and having an active surface and an inactive surface opposite the active surface, the active surface having a connection pad disposed thereon; at least one first passive component disposed in the second through hole; a first encapsulant encapsulating the core member encapsulating at least a portion of each of the core member and the at least one first passive component; a second encapsulant encapsulating at least a portion of the inactive surface of the semiconductor chip; and a connection member disposed on the core member, the active surface of the semiconductor chip, and the at least one first passive component, and including a redistribution layer electrically connected to the connection pad and the at least one first passive component.