Fan-out Semiconductor Package Warpage Control
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Solution Overview
Problem
Fan-out semiconductor packages face challenges in controlling warpage, which affects their rigidity and uniformity, especially as they are miniaturized and thinned for compactness and thermal/electrical performance in electronic devices.
Innovation Solution
Incorporating a core member with through-holes and recess portions filled with encapsulant, which redistributes connection pads outwardly of the semiconductor chip, enhancing rigidity and allowing precise control of encapsulant volume to manage warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the semiconductor package is miniaturized and thinned for compactness, then the size is reduced, but warpage control becomes difficult
Solution Approach 1:
The core member is divided into multiple recess portions (first, second, third recess portions) at different locations and depths, allowing localized adjustment of encapsulant volume to control warpage in different regions of the package
Solution Approach 2:
Different recess portions are formed with different depths and volumes to create localized variations in encapsulant distribution, enabling precise control of warpage in specific areas while maintaining overall package compactness
2Stability of the object's composition
If the core member includes multiple recess portions with different volumes, then warpage is controlled, but manufacturing complexity increases
Solution Approach 1:
The recess portions vary in depth and volume parameters, with the first recess portion having a greater volume than the second and third recess portions, allowing optimized warpage control through parameter adjustment rather than complex structural design
Data Source
AI summary
A fan-out semiconductor package includes: a core member having a through-hole; a semiconductor chip disposed in the through-hole of the core member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant covering at least portions of the core member and the semiconductor chip and filling at least portions of the through-hole; and a connection member disposed on the core member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads. The core member has a recess portion penetrating through at least portions of the core member, and at least a portion of the recess portion is filled with the encapsulant.


