Fan-Out Packaging Defect Detection Using Hybrid Illumination
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Solution Overview
Problem
The miniaturization of semiconductor chips makes it difficult to adjust the number of bumps and handle them effectively, and the diversity of chip sizes complicates board mounting, necessitating an efficient inspection method for defects in fan-out packaging processes.
Innovation Solution
An inspection method and system that generates layout data for patterns at different heights on a substrate, using image measuring apparatuses with dark-field and bright-field illumination to detect defects by comparing measured images with preliminary layout data, allowing for early detection of defects in the fan-out packaging process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If semiconductor chip size is reduced for high integration, then chip density is improved, but handling and testing difficulty increases
Solution Approach 1:
The patent transitions from direct chip inspection to inspecting the package substrate level, adding a dimensional layer to the inspection process. By inspecting patterns on the substrate rather than directly on miniaturized chips, the system overcomes the handling and testing difficulties associated with small chip sizes while maintaining detection capability.
2Adaptability or versatility
If fan-out packaging process is used to solve chip miniaturization issues, then adaptability is improved, but defect detection complexity increases
Solution Approach 1:
The patent combines dark-field and bright-field illumination systems into a single inspection apparatus. This merging allows the system to handle the increased complexity of fan-out packaging inspection by using multiple illumination modes within one integrated system, enabling detection of defects at various heights and patterns on the substrate.
Solution Approach 2:
The inspection system is designed with multi-functionality to inspect various types of patterns (through-holes, bumps, pads, traces) at different heights and locations on the substrate. This universal inspection capability addresses the adaptability requirements of fan-out packaging while managing inspection complexity through a single versatile system.
3Measurement precision
If patterns at different heights are inspected simultaneously, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent employs periodic action by sequentially switching between dark-field and bright-field illumination modes within the same optical path. This periodic switching allows the system to capture images of patterns at different heights with high precision while managing optical system complexity through time-sequential operation rather than requiring entirely separate optical systems.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables effective detection of defects in the fan-out packaging process, particularly in transparent or translucent interlayer layers, improving the reliability and efficiency of semiconductor package manufacturing by identifying defects at an early stage.
Implementation Method 1
patterns at different heights relative to a top surface of a substrate
Implementation Method 2
hybrid optical system with dark-field and bright-field illumination
Data Source
AI summary
An inspection method includes generating first layout data including information on a shape of a first pattern group, generating second layout data including information on a shape of a second pattern group, obtaining a target image including images of the first and second pattern groups, and detecting a defect pattern from the target image by comparing the first and second layout data with the target image. The first pattern group, the second pattern group, and the defect pattern are provided at different heights from each other, from a top surface of a substrate.


