Fan-out Sensor Package with TSV Interconnects for Miniaturization
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Solution Overview
Problem
Current image sensor packages face challenges in miniaturization and performance improvement due to spatial limitations and complex manufacturing processes, particularly in camera modules where thinness and efficient signal path are crucial.
Innovation Solution
A fan-out sensor package is developed, featuring a core member with a through-hole, an integrated circuit (IC) for a sensor encapsulated to expose the sensor region, and a redistribution layer on the opposite surface, with through-silicon vias connecting the IC to the redistribution layer, allowing for miniaturization and improved performance by securing a short signal path and reducing the need for rigid-flexible printed circuit boards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If traditional image sensor packaging is used, then the package structure is simple, but the package size cannot be miniaturized and the signal path is long
Solution Approach 1:
The patent transitions from a traditional planar packaging layout to a three-dimensional fan-out structure. The sensor chip is positioned vertically above the substrate with connection pads extending outward in multiple directions (fan-out), utilizing the Z-axis dimension to reduce the horizontal footprint. This dimensional change enables miniaturization of the overall package while maintaining short signal paths through vertical TSV connections.
Solution Approach 2:
The patent implements a nested structure where the sensor chip is embedded within a substrate, and the connection pads are nested within vias and redistribution layers. The TSVs are nested within the chip thickness, and the entire assembly is nested within a compact package footprint. This nesting approach allows multiple functional elements to occupy overlapping spatial volumes, reducing the overall package size.
2Ease of manufacture
If rigid-flexible printed circuit boards are used to connect the sensor, then the signal path is stable, but the manufacturing process becomes complex and costs increase
Solution Approach 1:
The patent extracts the complex rigid-flexible PCB interconnection structure and replaces it with a simplified substrate-integrated approach. The connection function is taken out from the PCB domain and implemented directly in the substrate using TSVs and redistribution layers, eliminating the need for separate rigid-flexible PCB assemblies while maintaining signal integrity through controlled impedance designs.
Solution Approach 2:
The patent introduces a substrate with TSVs and redistribution layers as an intermediary structure between the sensor chip and the external circuitry. This intermediary integrates the functions previously requiring rigid-flexible PCBs, providing both mechanical support and electrical interconnection in a single structure, thereby simplifying manufacturing while ensuring signal stability.
3Reliability
If the sensor region is covered for protection, then the sensor is protected from damage, but the sensing distance increases and recognition rate decreases
Solution Approach 1:
The patent applies local quality by providing selective coverage: the sensor region is left exposed at the first surface to maintain short sensing distance and high recognition rate, while other portions of the chip and substrate are covered by the encapsulant for protection. This localized approach to encapsulation ensures that the sensing area remains accessible while other components are protected from environmental damage.
Data Source
AI summary
The fan-out sensor package includes: a core member having a through-hole; an integrated circuit (IC) for a sensor disposed in the through-hole and having a first surface having a sensor region and first connection pads disposed thereon, a second surface opposing the first surface and having second connection pads disposed thereon, and through-silicon vias (TSVs) penetrating between the first and second surfaces and electrically connecting the first and second connection pads to each other; an encapsulant covering the core member and the second surface of the IC for a sensor and filling at least portions of the through-hole; a redistribution layer disposed on the encapsulant; and vias penetrating through at least portions of the encapsulant and electrically connecting the redistribution layer and the second connection pads to each other.