Fan-Out Signal Line Width Allocation for Voltage Drop Control
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Solution Overview
Problem
In display technology, particularly in liquid crystal display devices with Mini-LED backlights, the fan-out region of the wiring substrate faces challenges with voltage drop and temperature rise due to restrictive dimensional parameters, leading to poor electrical performance and increased production costs.
Innovation Solution
A method is introduced to dynamically allocate widths to target signal lines in the fan-out region based on voltage drop and temperature rise conditions, ensuring that the voltage drop of each signal line is within safety thresholds, thereby improving the overall voltage drop level of the wiring substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the width of signal lines in the fan-out region is increased to reduce voltage drop, then the electrical performance is improved, but the available space is reduced and manufacturing complexity increases
Solution Approach 1:
The patent applies different width values to different signal lines based on their specific voltage drop characteristics and current requirements. Instead of uniformly increasing all signal line widths, the method calculates and assigns optimized widths individually to each signal line in the fan-out region, achieving localized optimization that reduces overall space consumption while maintaining electrical performance.
Solution Approach 2:
The patent changes the width parameter of signal lines dynamically based on calculated voltage drop and current requirements. By adjusting the width parameter of each signal line according to its specific electrical characteristics, the method achieves optimal balance between voltage drop reduction and space utilization without requiring uniform width increases across all signal lines.
2Reliability
If the width of signal lines is increased to reduce voltage drop, then the electrical performance is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent performs preliminary calculation and planning of signal line widths before the actual manufacturing process. By pre-calculating the optimal width for each signal line based on its electrical characteristics and voltage drop requirements, the method provides clear manufacturing guidelines that reduce the complexity and precision requirements during the actual fabrication process.
3Ease of manufacture
If uniform width allocation is used for all signal lines, then the manufacturing process is simplified, but the voltage drop problem cannot be effectively solved
Solution Approach 1:
The patent implements local quality optimization by assigning different width values to different signal lines based on their specific electrical characteristics. This approach maintains manufacturing simplicity through an automated calculation and assignment process while effectively addressing the voltage drop problem for each individual signal line, avoiding the need for complex manual optimization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces the maximum voltage drop of target signal lines, enhancing the electrical performance of the wiring substrate while maintaining the same width sum, thus improving product yield and reducing production costs.
Implementation Method 1
determining a planar region R based on conditions satisfied by a voltage drop V and a temperature rise T of each of the target signal lines to be allocated widths and widths W of the target signal lines to be allocated widths, the voltage drop V being a function V (L, W) of a length L and a width W
Implementation Method 2
determining a planar region R based on conditions satisfied by a voltage drop V and a temperature rise T of each of the target signal lines to be allocated widths and widths W of the target signal lines to be allocated widths, the temperature rise T being a function T (L, W) of the length L and the width W
Data Source
AI summary
A method of allocating widths for target signal lines, a wiring substrate, a light-emitting substrate and a display device are provided. The method includes numbering the target signal lines; performing the following operations at least once until the number of target signal lines in a set is zero, determining the set of target signal lines; determining a region R based on the conditions satisfied by a voltage drop V, a temperature rise T, and widths W of the target signal lines, determining the number i of the target signal line with the maximum voltage drop in the set; substituting a known length Li of the target signal line numbered i into V (L, W) to obtain V (Li, W) and obtaining Wi based on an intersection of V (Li, W) and a boundary of the region R, and removing the target signal line with the width Wi from the set.