Fast Carry Lookahead Adder With Separate Paths

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Solution Overview

Problem

Existing carry-lookahead adder circuits suffer from delays in the main carry-path, entrance path, and exit path due to the shared multiplexers, which limit their speed and efficiency.

Innovation Solution

The implementation of a fast lookahead carry adder with separate carry entrance and exit paths, reducing the number of multiplexers in these paths and using buffers to isolate the carry-exit path from the carry-in input, thereby reducing capacitive loading and propagation delay.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If shared multiplexers are used in the carry path, then device complexity is reduced, but propagation delay increases

Engineering Contradiction:

Improvenumber of multiplexersVSAvoidpropagation delay

Core Design Contradiction:

Device complexityVSSpeed

Solution Approach 1:

The patent divides the carry path into separate entrance path and exit path, each with dedicated multiplexers. This segmentation eliminates signal conflicts and reduces propagation delay by ensuring that multiplexers in the entrance path do not share signals with multiplexers in the exit path, allowing independent optimization of each path.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces separate multiplexer instances as intermediaries between the carry-in input and the carry-out output. By placing dedicated multiplexers in the entrance path and exit path rather than sharing them, the design mediates the carry signal transmission to eliminate conflicts and reduce delay.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Speed

If buffers are added to isolate the carry-exit path, then propagation delay is reduced, but device complexity increases

Engineering Contradiction:

Improvepropagation delayVSAvoidnumber of buffers

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The patent uses buffers as intermediary elements to isolate the carry-exit path from the carry-in input. These buffers act as mediators that prevent capacitive coupling and signal conflicts between paths, reducing propagation delay while adding minimal complexity compared to the benefit gained.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extracts and isolates the carry-exit path from the carry-in input by introducing buffers. This extraction separates the functions of the entrance path and exit path, removing harmful capacitive interactions and enabling faster signal transmission.

Inventive Principle:

Principle #2Taking out (Extraction)

3Speed

If the number of multiplexers in the carry entrance path is reduced, then propagation delay is shortened, but adaptability decreases

Engineering Contradiction:

Improvepropagation delayVSAvoidpath configuration flexibility

Core Design Contradiction:

SpeedVSAdaptability or versatility

Solution Approach 1:

The patent segments the carry path into distinct entrance and exit paths with dedicated multiplexers. This segmentation maintains adaptability by allowing independent configuration of each path while reducing overall propagation delay through optimized signal routing and reduced multiplexer count in critical paths.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS9170774B2Fast carry lookahead circuits

Publication Date: 2015.10.27 MICROSEMI SOC CORP

AI summary

A fast lookahead carry adder includes adder logic and lookahead carry-path logic coupled to the adder logic. The carry path logic has a main carry path, a carry entrance path and a carry exit path, the carry entrance path separate from the carry exit path.