Fast Chirp PLL Boost Current Control for Overshoot-Free Return
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Solution Overview
Problem
Advanced radar systems face challenges in maintaining low phase noise and ramp linearity due to frequency overshoot and PLL unlock during fast chirp modulation, which corrupts radar signal integrity.
Innovation Solution
A boost current is determined and applied to the PLL filter stage during the return phase, proportional to the slope of the return phase and inversely proportional to the VCO gain, to control the frequency transition from stop to start frequency, reducing frequency overshoot and improving PLL settling time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the PLL bandwidth is set to a relatively low value to filter out noise contributions, then phase noise is reduced, but the ramp linearity deteriorates during fast chirp modulation
Solution Approach 1:
The patent dynamically adjusts the PLL bandwidth by switching between a first bandwidth during the chirp phase and a second bandwidth during the return phase. This dynamic adjustment allows the system to maintain low phase noise during chirp while enabling fast return without frequency overshoot, resolving the contradiction between noise filtering and linearity maintenance.
Solution Approach 2:
The patent changes the PLL bandwidth parameter based on the operational phase (chirp or return). By modifying this key parameter adaptively, the system achieves both low phase noise during frequency ramping and fast, linear return without overshoot, effectively resolving the technical contradiction.
2Productivity
If the return phase is made faster to increase productivity, then chirp rate is improved, but frequency overshoot occurs causing linearity issues
Solution Approach 1:
The patent employs dynamic bandwidth adjustment where the PLL operates with a first bandwidth during chirp and switches to a second bandwidth during return phase. This enables fast return while maintaining frequency linearity and preventing overshoot, thus achieving high productivity without sacrificing precision.
Solution Approach 2:
The patent applies periodic switching of PLL bandwidth corresponding to the periodic chirp-return cycle. During each chirp phase, the bandwidth is set to one value, and during each return phase, it switches to another value. This periodic adaptation allows fast returns while maintaining linearity, resolving the contradiction between speed and precision.
3Loss of time
If the PLL bandwidth is increased to improve return phase speed, then return time is reduced, but phase noise increases
Solution Approach 1:
The patent dynamically switches PLL bandwidth based on operational phase: using a narrower bandwidth during chirp to minimize phase noise, and a wider bandwidth during return phase to accelerate frequency transition. This temporal separation of bandwidth settings resolves the contradiction between fast return and low phase noise.
Solution Approach 2:
The patent implements periodic modulation of PLL bandwidth synchronized with the chirp-return cycle. The bandwidth is periodically adjusted to be narrow during chirp (reducing noise) and wide during return (reducing time), effectively resolving the time-noise tradeoff through rhythmic parameter variation.
Data Source
AI summary
A fast chirp Phase Locked Loop with a boosted return time includes a Voltage Controlled Oscillator, VCO, generating a Frequency Modulated Continuous Waveform, FMCW. The VCO responds to a filtered output voltage of a filter connected to a charge pump. A digital controller modifies the FMCW to generate a chirp phase and a return phase. The chirp phase includes a first linear change of the FMCW from a start frequency to a stop frequency. The return phase includes a second linear change of the FMCW from the stop frequency to the start frequency. A boost circuit connects to the digital controller and the filter. The boost circuit supplies a boost current during the return phase. The boost current is proportional to a return slope of the return phase and inversely proportional to a VCO gain of the VCO.