Fast Flash Standby BIOS Module for Secure Hibernation
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Solution Overview
Problem
Current computing systems face challenges in achieving fast hibernation and resumption while ensuring security and power savings, particularly due to high latencies in S4 states and security concerns with data stored in non-volatile memory.
Innovation Solution
The implementation of Fast Flash Standby (FFS) BIOS module, which works with a solid-state drive to treat S3 as S4, securely saving volatile system memory to a storage medium, using encryption, cryptographic hashing, and password substitution to ensure data integrity and security during hibernation and resumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the system enters S4 hibernation state to save power, then power savings are improved, but resume latency increases due to slow HDD access
Solution Approach 1:
The patent segments the memory storage into two parts: frequently accessed system context data is stored in fast DRAM, while less frequently accessed data is stored in slower non-volatile memory. This allows the system to achieve deep power savings by powering down most memory while maintaining fast resume capability for critical system data.
Solution Approach 2:
The patent applies different quality characteristics to different parts of the memory system. Critical system context data receives high-quality fast DRAM storage for rapid access, while other data can use lower-quality slower storage. This local differentiation resolves the contradiction by ensuring fast resume where it matters most while achieving overall power savings.
2Loss of time
If the system enters S3 sleep state for fast resume, then resume speed is improved, but power savings decrease due to DRAM being kept powered
Solution Approach 1:
The patent segments memory content into essential system context that must be preserved in fast DRAM and other data that can be stored in slower non-volatile memory. This segmentation allows the system to power down most DRAM for power savings while keeping only critical data in fast memory for quick resume.
Solution Approach 2:
The patent applies partial action by keeping only the minimum necessary system context in powered DRAM rather than all memory content. This partial retention of data in fast memory achieves power savings while maintaining sufficient resume speed for system operation.
3Loss of energy
If memory contents are saved to non-volatile memory for hibernation, then power savings are improved, but security risks increase due to potential data exposure
Solution Approach 1:
The patent segments sensitive system context data and separates it from other data. Critical security-sensitive information remains in volatile DRAM during hibernation rather than being written to non-volatile storage, reducing the security risk of data exposure while still achieving power savings through selective memory management.
Solution Approach 2:
The patent extracts sensitive data from the set of data being written to non-volatile memory. By taking out security-critical information from the hibernation storage operation and keeping it in volatile memory, the system achieves power savings on non-sensitive data while maintaining security posture.
Data Source
AI summary
Secure fast platform hibernation and resumption for computing systems. An embodiment of an apparatus includes a processor to operate according to an operating system, the processor to transition the apparatus to a first reduced power state in response to a request, the transition to the first reduced power state including the processor to store context data for the apparatus in a volatile system memory, and logic to transition the apparatus to a second reduced power state, the logic to write the context data from the volatile system memory to a nonvolatile memory for the transition to the second reduced power state, wherein the logic is to implement one or more security measures for the writing of the context data into the nonvolatile memory.