Fast Synchronization Mechanism for Heterogeneous Computing Clusters
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Solution Overview
Problem
Conventional data synchronization in heterogeneous computing systems is inefficient and consumes a significant number of processing cycles due to the need for individual sync commands for each cache line, leading to high overhead.
Innovation Solution
A sync circuit in a heterogeneous computing system uses a snoop filter to identify cache lines to be synchronized, offloading address comparisons from inner processors and speeding up the synchronization process by utilizing snoop filter information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a CPU issues individual sync commands for each cache line address, then data synchronization is complete, but processing cycles and overhead increase significantly
Solution Approach 1:
The patent segments the synchronization process into two phases: (1) the sync circuit identifies target cache lines by comparing address ranges with snoop filter entries, and (2) only those identified cache lines receive sync commands. This segmentation eliminates the need for sequential individual commands for all cache lines, resolving the contradiction between complete synchronization and processing efficiency.
Solution Approach 2:
The sync circuit acts as an intermediary between the CPU and the processors. Instead of the CPU directly issuing commands to all processors for all cache lines, the sync circuit uses the snoop filter as an intermediary data structure to identify which cache lines need synchronization, thereby reducing the number of commands issued and improving processing efficiency while maintaining synchronization completeness.
2Reliability
If processors search their data caches for each sync command, then data coherence is maintained, but processing overhead increases
Solution Approach 1:
The snoop filter is updated in advance with address range information from memory operations. When synchronization is needed, the sync circuit queries this pre-updated snoop filter to identify target cache lines before issuing sync commands. This preliminary action eliminates the need for processors to search their caches for each individual sync command, reducing processing overhead while maintaining data coherence.
3Reliability
If individual sync commands are issued for each cache line, then data consistency is ensured, but synchronization time increases
Solution Approach 1:
The patent merges multiple individual sync operations into a batched approach. The sync circuit identifies all cache lines within the address range that need synchronization by comparing with snoop filter entries, and then issues sync commands for multiple cache lines simultaneously rather than sequentially. This merging reduces synchronization time while ensuring data consistency across all identified cache lines.
Data Source
AI summary
A heterogeneous computing system performs data synchronization. The heterogeneous computing system includes a system memory, a cluster, and a processing unit outside the cluster. The cluster includes a sync circuit, inner processors, and a snoop filter. The sync circuit is operative to receive a sync command indicating a sync address range. The sync command is issued by one of the processing unit and the inner processors. The sync circuit further determines whether addresses recorded in the snoop filter fall within the sync address range. In response to a determination that a recorded address falls within the sync address range, the sync circuit notifies a target one of the inner processors that owns a cache line having the recorded address to take a sync action on the cache line.