Fast-scanning Control Transfer Instruction Detection in Processor IFU

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Solution Overview

Problem

As processor clock speeds increase, it becomes challenging to perform control-transfer instruction (CTI) scanning operations within a single pipeline stage in the instruction-fetch unit (IFU), leading to reduced processor performance, as additional pipeline stages are required to complete CTI-scanning, which can decrease overall performance.

Innovation Solution

A method that performs a fast-scanning operation to identify control transfer instructions in a group of initial instructions within a cache line, allowing the formation of initial fetch bundles without using an additional pipeline stage by utilizing both complete-scanning and fast-scanning operations concurrently, where fast-scanning results are used to send initial fetch bundles to the instruction-issue unit before complete-scanning results are available.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a complete-scanning operation is performed on the entire cache line to identify CTIs, then CTI detection accuracy is improved, but the time required to complete the scanning operation increases

Engineering Contradiction:
ImproveCTI detection accuracyVSAvoidscanning operation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent divides the cache line into multiple segments: initial instructions that are scanned completely to form an initial fetch bundle, and remaining instructions that are scanned later. This segmentation allows the system to perform CTI scanning on only the initial portion of instructions first, reducing the time required to form the first fetch bundle while maintaining accurate CTI detection in the scanned portion.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary CTI scanning on the initial instructions before the complete scanning operation finishes. By identifying CTIs in the initial instructions first and forming the initial fetch bundle earlier, the system reduces the overall time loss without sacrificing the accuracy of CTI detection in the initial portion that will be executed first.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If an additional pipeline stage is added to perform CTI-scanning operation, then CTI scanning completeness is improved, but processor performance deteriorates

Engineering Contradiction:
ImproveCTI scanning completenessVSAvoidprocessor performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements a dynamic scanning approach where the system performs fast scanning on initial instructions to form an initial fetch bundle, then continues with complete scanning on remaining instructions. This dynamic, multi-phase scanning process maintains CTI scanning completeness while improving processor performance by keeping the pipeline flowing with initial instructions rather than stalling for complete scanning of the entire cache line.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent ensures continuous useful action by performing CTI scanning on initial instructions and immediately forming an initial fetch bundle that can be sent to the instruction-issue unit while the complete scanning operation continues on remaining instructions. This continuity prevents pipeline stalls and maintains processor performance while ensuring complete CTI scanning is eventually performed.

Inventive Principle:
Principle #20Continuity of useful action

3Speed

If fast-scanning operation is performed on only initial instructions, then fetch bundle formation speed is improved, but CTI detection completeness deteriorates

Engineering Contradiction:
Improvefetch bundle formation speedVSAvoidCTI detection completeness
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The patent implements periodic scanning action by performing fast scanning on initial instructions first to form the initial fetch bundle, then performing complete scanning on remaining instructions in subsequent cycles. This periodic approach ensures that CTI detection is completed for all instructions eventually, maintaining detection completeness while improving the speed of initial fetch bundle formation.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS7941638B2Facilitating fast scanning for control transfer instructions in an instruction fetch unit
Publication Date: 2011.05.10 ORACLE AMERICAN INC
  • US7941638B2 patent drawing
  • US7941638B2 patent drawing
  • US7941638B2 patent drawing

AI summary

One embodiment of the present invention provides a system that performs a fast-scanning operation to generate fetch bundles within an instruction fetch unit (IFU) of a processor. During operation, the system obtains a cache line containing instructions at the IFU. Next, the system performs a complete-scanning operation on the cache line to identify control transfer instructions (CTIs) in the cache line. At the same time, the system performs a fast-scanning operation to identify CTIs in a group of initial instructions in the cache line, wherein the initial instructions are executed before other instructions in the cache line. Next, the system obtains results from the fast-scanning operation before results of the complete-scanning operation are available. The system then uses results from the fast-scanning operation to form an initial fetch bundle containing initial instructions, and sends the initial fetch bundle to the instruction-issue unit.