Fast Serial Interface Galvanic Isolation Low Latency
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Solution Overview
Problem
Conventional galvanic isolation devices introduce significant signal delays, skew, high latency, and low data transmission reliability, making them unsuitable for high-speed and critical control systems.
Innovation Solution
The Fast Serial Interface (FSI) method employs source-synchronous double data rate transmission, skew adjustment, cyclical redundancy checks, and automatic line integrity checks to ensure reliable and low-latency communication across galvanic isolation devices, packaged with SPI-compatible devices for flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional galvanic isolation devices are used for serial communication, then electrical isolation between circuits is achieved, but signal delays and skew increase significantly
Solution Approach 1:
The system uses periodic clock signaling with active and inactive phases. During active phases, data is transmitted through the galvanic isolator; during inactive phases, the isolator returns to a default state. This periodic operation allows the system to achieve electrical isolation while maintaining predictable timing and reducing signal delay through synchronized transmission windows.
Solution Approach 2:
The transmitter prepares data frames with predetermined structures including start bits, data bits, and stop bits before transmission. The system pre-synchronizes clock and data signals, and pre-establishes communication protocols to minimize processing delays during actual data transmission through the galvanic isolator.
2Reliability
If conventional galvanic isolation devices are used, then circuit isolation is provided, but latency increases
Solution Approach 1:
The system maintains continuous synchronization between transmitter and receiver using ongoing clock signals and periodic frame transmissions. By keeping the communication channel continuously active with structured frames rather than intermittent transmissions, the system reduces idle time and latency while maintaining galvanic isolation.
Solution Approach 2:
The system dynamically adjusts transmission parameters including clock frequency, frame length, and data rate to optimize performance. By changing these parameters based on communication needs, the system achieves low latency for time-critical data while maintaining isolation, and can reduce data rates when isolation requirements are paramount.
3Productivity
If conventional serial communication methods are used across isolation devices, then data transmission occurs, but data transmission reliability decreases
Solution Approach 1:
The system implements feedback mechanisms where the receiver acknowledges received frames and the transmitter verifies successful transmission. Error detection codes are incorporated into each frame, and the system uses retransmission protocols to ensure data integrity, thereby maintaining high reliability while achieving continuous data transmission through the galvanic isolator.
Solution Approach 2:
The system incorporates error detection and correction codes in advance within each data frame structure. By preparing these protective measures beforehand rather than reacting to errors after they occur, the system ensures reliable data transmission even when signals pass through the galvanic isolator which may introduce noise or distortion.
4Productivity
If high-speed transmission is implemented, then bandwidth increases, but skew between signals increases
Solution Approach 1:
The system segments data transmission into discrete frames with individual clock and data signal channels. By separating the transmission into synchronized segments rather than attempting simultaneous multi-channel transmission, the system achieves high bandwidth through efficient frame structures while maintaining precise timing and minimizing skew between signals.
Data Source
AI summary
Methods and apparatus to perform serial communications are disclosed. An example serial data transmitter includes: a clock signal generator to generate a digital clock signal; a clock signal controller to enable the clock signal generator; a line break signal generator to, in response to an expiration of a time period, trigger the transmission of a transmission line check frame; a data integrity check generator to generate error detection data corresponding to first data to be transmitted via the transmission port; a signal framer to: generate a first data frame having a preamble, second data, third data, the first data, the error detection data, and fourth data; and generate the transmission line check frame.