Fat-Tree Switch Algorithmic Forwarding Circuitry
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Fat-Tree networks face inefficiencies in packet routing due to large storage consumption and high processing latency of forwarding databases (FDBs), which also lead to prolonged network downtime during configuration or failure scenarios.
Innovation Solution
The implementation of algorithmic forwarding techniques using bit-group extraction operations on destination addresses to select egress ports, with the option of temporary ports and fallback databases to manage port mappings and handle failures, reducing latency and improving traffic distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If forwarding databases (FDBs) are used for packet routing in Fat-Tree networks, then routing information can be stored and retrieved, but storage consumption increases and processing latency increases
Solution Approach 1:
The patent extracts the essential routing information from the complete FDB structure, using only the necessary bits (such as network address and port identification) to determine egress ports. This selective extraction reduces storage consumption while maintaining routing capability by focusing only on critical routing elements rather than storing complete forwarding database entries.
Solution Approach 2:
The patent creates a simplified copy of the routing information structure, using compact bit representations instead of full FDB entries. By copying only the essential routing fields (network address, egress port identification) into a condensed format, the system reduces storage requirements while preserving the core routing functionality.
2Reliability
If forwarding databases (FDBs) are used for packet routing in Fat-Tree networks, then routing information can be stored and retrieved, but processing latency increases
Solution Approach 1:
The patent extracts only the essential routing fields from destination addresses (such as network address bits and port identification bits) to directly determine egress ports. This extraction approach eliminates the need for time-consuming database lookups by computing routing decisions through direct bit manipulation, significantly reducing processing latency while maintaining routing accuracy.
Solution Approach 2:
The patent replaces the mechanical database lookup process with a computational bit-manipulation approach. Instead of searching through stored FDB entries (mechanical system), the system uses bit extraction and comparison operations to directly compute egress port selections, transforming the routing process into a faster computational operation.
3Reliability
If conventional FDBs are used for packet routing, then routing information is available, but network downtime increases during configuration or failure scenarios
Solution Approach 1:
The patent performs preliminary bit extraction and routing decision computation before packets arrive, pre-determining egress port selections based on destination addresses. This preliminary action allows the system to have routing decisions ready in advance, reducing network downtime during configuration changes or failure scenarios by having pre-computed routing paths available immediately.
Solution Approach 2:
The patent changes the parameter representation from complete FDB entries to compact bit-group extractions from destination addresses. By transforming the routing information format to use direct bit manipulations of address fields, the system creates a more flexible and rapidly adaptable routing mechanism that can quickly respond to configuration changes or failures without extensive database reconfiguration.
4Loss of time
If bit-group extraction operations are used to select egress ports, then latency is reduced and storage requirements are reduced, but the system complexity increases
Solution Approach 1:
The patent segments the destination address into distinct bit groups (network address bits, port identification bits, etc.) and applies specific extraction operations to each segment. This segmentation approach simplifies the overall complexity by breaking down the bit-manipulation logic into manageable, modular operations that can be independently implemented and optimized, reducing the burden of system complexity while maintaining low latency performance.
Data Source
AI summary
A switch includes multiple physical ports and forwarding circuitry. The physical ports are configured to receive and send packets over a network. The forwarding circuitry is configured to assign first port numbers to the physical ports, and second port numbers to temporary ports defined in addition to the physical ports, to receive a packet having a destination address via a physical port, to select, based on the destination address, an egress port number for the packet from among the first and second port numbers, to forward the packet to a physical port corresponding to the egress port number if the egress port number is one of the first port numbers, and, if the egress port number is one of the second port numbers, to map a temporary port associated with the egress port number to a mapped physical port and to forward the packet to the mapped physical port.