Fault-Aware Analog Model for Circuit Defect Simulation
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Solution Overview
Problem
Current analog defect simulation (ADS) methods are inefficient due to the need for extensive transistor-level simulations, which are time-consuming and costly, especially when dealing with modern circuits containing tens of thousands of transistors, as they require complete enumeration of defect universes, making it impractical even with powerful compute clusters.
Innovation Solution
Development of fault-aware analog models (FAAMs) that use data-driven methods to approximate the input-to-output relationships of circuit blocks, both in-spec and out-of-spec, by generating reference datasets and employing machine learning approaches or lookup tables to speed up simulations and reduce defect universe size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If transistor-level simulations are used for analog defect simulation, then simulation accuracy is improved, but simulation time and computational cost increase significantly
Solution Approach 1:
The patent creates behavioral models that copy the input-output behavior of circuit blocks without replicating the full transistor-level structure. These behavioral models serve as simplified copies that maintain accuracy for defect simulation purposes while dramatically reducing computational complexity and simulation time.
Solution Approach 2:
The patent divides the circuit into discrete blocks and creates separate behavioral models for each block. This segmentation allows the complex circuit to be modeled as a collection of simpler, independent behavioral units, reducing overall simulation time while maintaining accuracy through systematic composition of block-level models.
2Reliability
If complete enumeration of defect universes is performed, then test coverage is improved, but computational resources and time requirements become impractical
Solution Approach 1:
The patent uses behavioral models as simplified copies that enable efficient exploration of defect universes. By working with these compressed representations rather than full transistor-level models, the system can enumerate and evaluate far more defect scenarios within practical computational limits, improving test coverage.
Solution Approach 2:
The patent transforms the simulation approach by changing from detailed transistor-level parameters to behavioral input-output parameters. This parameter transformation enables the system to handle larger defect universes by working with reduced-dimensional representations that capture essential behavior without excessive computational burden.
3Productivity
If behavioral models are used to approximate circuit behavior, then simulation speed is improved, but accuracy in capturing fault behavior may deteriorate
Solution Approach 1:
The patent performs preliminary characterization of circuit blocks to extract behavioral models that are specifically tuned to capture fault behavior. By pre-computing and storing input-output relationships under various conditions including fault scenarios, the models are prepared in advance to accurately represent both nominal and faulty behavior during actual defect simulation.
Solution Approach 2:
The patent incorporates feedback mechanisms where behavioral models are refined and validated against actual circuit behavior. The models are iteratively improved by comparing their predictions with ground truth data, ensuring they accurately capture fault behavior while maintaining computational efficiency for rapid simulation.
Data Source
AI summary
A fault aware analog model (FAAM) system is disclosed. The FAAM system comprises a FAAM builder module comprising a model construction module configured to receive a reference dataset associated with a circuit block. The reference dataset comprises a set of data values that defines input to output relationship of the circuit block for both in spec and out of spec operation of the circuit block. The reference data set is derived based on data associated with a ground truth representation of the circuit block. In some embodiments, the model construction module is further configured to generate a FAAM comprising a behavioral model of the circuit block, based on the reference dataset, wherein the FAAM is configured to approximate the input to output relationship of the circuit block that is defined by the set of data values in the reference dataset.