Fault-Aware Memory Sparing for Uncorrectable Error Recovery

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Solution Overview

Problem

Existing memory systems face inefficiencies in addressing uncorrectable errors (UEs) due to 'blind' sparing techniques that waste resources or fail to adequately correct errors, and memory mirroring that reduces available capacity, as they lack fault-aware analysis to identify the specific cause of errors.

Innovation Solution

A fault-aware analysis system that identifies the specific hardware component causing uncorrectable errors through statistical prediction, enabling runtime sparing and mirroring to reserved memory spaces based on the underlying cause, allowing proactive or lazy failover without rebooting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional sparing techniques are used to address uncorrectable errors, then system reliability is improved, but memory resource wastage increases due to blind mapping without fault awareness

Engineering Contradiction:
Improvesystem reliabilityVSAvoidmemory resource wastage
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The system implements feedback by continuously monitoring error patterns and using them to inform sparing decisions. The memory controller analyzes error information from multiple memory locations and uses this feedback to intelligently allocate spare memory resources only where needed, rather than blindly mapping out entire regions.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies local quality by transitioning from global blind sparing to localized fault-aware sparing. Instead of mapping out entire memory regions when any error occurs, the system identifies specific faulty memory locations and allocates spare resources locally to those precise areas, minimizing overall resource wastage while maintaining reliability.

Inventive Principle:
Principle #3Local quality

2Reliability

If memory mirroring is implemented to provide failover protection, then system reliability is improved, but available memory capacity is reduced

Engineering Contradiction:
Improvesystem reliabilityVSAvoidavailable memory capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The system applies partial action by implementing selective mirroring rather than full memory mirroring. Instead of creating redundant copies of entire memory regions, the memory controller mirrors only specific cachelines or memory locations that have been identified as faulty through error analysis, thus providing necessary failover protection while preserving most of the available memory capacity.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent implements local quality through localized mirroring strategies. Rather than uniformly mirroring all memory, the system creates redundant copies only for specific faulty cachelines or memory regions, allowing different parts of memory to have different redundancy levels based on their actual fault status.

Inventive Principle:
Principle #3Local quality

3Reliability

If blind sparing maps out memory regions due to errors, then error protection is provided, but the sparing may be insufficient to address the underlying cause or overly wasteful

Engineering Contradiction:
Improveerror protectionVSAvoidsparing adequacy
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The system uses feedback from error analysis to dynamically adjust sparing strategies. By continuously monitoring error patterns and analyzing their root causes, the memory controller can adaptively allocate and adjust spare memory resources to match the actual fault conditions, ensuring adequate protection without excessive wastage.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent implements dynamics by making sparing configurations adaptive rather than static. The system can dynamically allocate, adjust, and reconfigure spare memory resources based on real-time error analysis and fault identification, allowing the sparing strategy to evolve and adapt to changing fault patterns and underlying causes.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12602299B2Runtime sparing for uncorrectable errors based on fault-aware analysis
Publication Date: 2026.04.14 INTEL CORP
  • US12602299B2 patent drawing
  • US12602299B2 patent drawing
  • US12602299B2 patent drawing

AI summary

A system can respond to detection or prediction of an uncorrectable error (UE) in memory based on fault-aware analysis. The fault-aware analysis enables the system to generate a determination of a specific hardware element of the memory that is faulty. In response to detection of an error, the system can correlate a hardware configuration of the memory device with historical data indicating memory faults for hardware elements of the hardware configuration. Based on a determination of the specific component that likely caused the UE, the system can identify a region of memory associated with the detected UE and mirror the faulty region to a reserved memory space of the memory device for access to data of the faulty region.