Fault Collection Circuit for Automotive Error Signal Routing

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Solution Overview

Problem

Future generation processing systems, particularly micro-controllers for automotive applications, face increased complexity due to new functionalities and stringent operational constraints, requiring improved error handling to ensure safety and reliability, especially in Car2X and autonomous driving environments.

Innovation Solution

A processing system with a fault collection circuit that generates combined error signals through combinational logic circuits, allowing selective routing of error signals to error pads and safety-critical pins, enabling configurable error reporting and handling, independent of the processing unit's operation, to maintain system safety and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the processing system increases complexity to handle more functionalities and safety requirements, then the system's capability to handle errors and ensure safety improves, but the device complexity increases

Engineering Contradiction:
Improveerror handling capabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The error handling system is segmented into independent functional blocks: error signal generation units in different circuits, a fault collection circuit with combinational logic, and configurable routing paths. This segmentation allows each component to be optimized independently while maintaining overall system reliability without proportionally increasing complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary error detection and collection before errors propagate through the system. The fault collection circuit continuously monitors and combines error signals from multiple sources, preparing consolidated error information in advance so that safety-critical responses can be triggered immediately without complex real-time analysis.

Inventive Principle:
Principle #10Preliminary action

2Loss of information

If the system routes all error signals to all error pads for comprehensive error reporting, then the completeness of error information improves, but the device complexity and signal routing complexity increase

Engineering Contradiction:
Improveerror information completenessVSAvoidsignal routing complexity
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The error signal routing is made dynamic and configurable through the combinational logic circuit. Different error signals can be selectively routed to different error pads based on configuration settings, allowing the system to adapt the routing topology according to specific safety requirements without hardcoding complex routing paths.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The fault collection circuit serves multiple functions: it collects error signals from various circuits, combines them through configurable logic, and routes them to appropriate error pads. This multi-functional design eliminates the need for separate dedicated routing paths for each error source, reducing overall routing complexity while maintaining comprehensive error reporting capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11977438B2Processing system, related integrated circuit and method
Publication Date: 2024.05.07 STMICROELECTRONICS INT NV
  • US11977438B2 patent drawing
  • US11977438B2 patent drawing
  • US11977438B2 patent drawing

AI summary

A processing system includes a plurality of circuits configured to generate a plurality of error signals. The processing system further includes a plurality of error pads and a fault collection circuit configured to receive the plurality of error signals and to generate a respective combined error signal for each of the plurality of error pads. The fault collection circuit includes a combinational logic circuit configured to generate the combined error signal by selectively routing the plurality of error signals to the plurality of error pads as a function of a set of configuring bits.