Fault Containment Routing in Circuit Boards
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Solution Overview
Problem
Conventional circuit board designs struggle to effectively contain faults within specific regions, leading to potential propagation of electrical shorts between primary and redundant circuits, which can compromise mission-critical systems like space flight hardware.
Innovation Solution
The implementation of multiple fault containment regions within a circuit board, separated by chassis ground layers, where each region includes dedicated signal, power, and return path layers, along with electrically conductive rings and vias, to isolate and contain faults within their designated areas, preventing propagation across the board.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Weight of stationary object
If redundant circuits are packaged within a single enclosure to minimize weight, then weight is reduced, but fault propagation risk increases due to potential electrical shorts between circuit cards
Solution Approach 1:
The circuit board is divided into multiple fault containment regions separated by chassis ground layers. Each region contains specific circuit cards (primary or redundant) and is electrically isolated from other regions. This segmentation prevents fault propagation between regions while maintaining weight efficiency through integrated packaging.
Solution Approach 2:
Chassis ground layers are introduced as intermediary elements between fault containment regions. These ground layers provide a safe path for fault currents and electrically isolate adjacent regions, preventing direct fault propagation while allowing the regions to coexist in a compact enclosure.
2Reliability
If physical distance is increased between fault containment regions to prevent fault propagation, then fault containment improves, but routing complexity and board space increase
Solution Approach 1:
Instead of increasing horizontal physical distance between regions, the patent uses vertical separation with chassis ground layers inserted between signal layers. This dimensional approach to fault containment allows regions to be closely spaced horizontally while maintaining electrical isolation through the vertical ground layer barrier, thereby simplifying routing.
3Reliability
If multiple fault containment regions are implemented with separate power and return paths, then fault containment effectiveness improves, but manufacturing complexity increases
Solution Approach 1:
The chassis ground layers serve multiple functions simultaneously: they act as fault containment barriers between regions, provide return paths for signals within regions, and serve as power distribution planes. This multi-functionality reduces the need for separate dedicated structures for each function, thereby simplifying manufacturing while maintaining effective fault containment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances fault containment, simplifies routing rules, and ensures that faults are isolated within their respective regions, maintaining signal integrity and preventing cross-talk between fault containment regions, thus ensuring the reliability of mission-critical systems.
Implementation Method 1
A fault containment region is a region within a circuit board that is designed to contain a fault occurring within that region to that region
Implementation Method 2
The via is surrounded by an electrically conductive ring in each layer within the other fault containment region
Data Source
AI summary
Systems and methods described herein provide for a circuit board having multiple fault containment regions therein. The circuit board includes a first fault containment region defined, at least in part, by first and second metal layers coupled to ground. The first fault containment region includes a first signal layer between the first and second metal layers, a third metal layer between the first and second metal layers, the third metal layer connected to the first signal layer to provide a return path for the first signal layer, and a fourth metal layer between the first and second metal layers, the fourth metal layer connected to the first signal layer to provide power to the first signal layer. The circuit board also includes a second fault containment region in a plurality of layers below the first fault containment region.