Fault Current Detecting Circuit Surge Discrimination

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Solution Overview

Problem

Existing fault current detecting circuits in electric power systems suffer from delayed trip control and potential erroneous operations due to surge signals, leading to unnecessary power cutoffs and damage.

Innovation Solution

A fault current detecting circuit that includes a current detection unit, first and second comparing circuit units, and a trip determining unit, where the trip determining unit outputs a trip control signal only when specific output signals are maintained for a short period of 100 microseconds, and a third comparing circuit unit compares the current detection signal with a current detection limit reference value to differentiate between fault and surge currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the trip determining unit waits for a predetermined period (1 millisecond) before outputting the trip control signal, then the reliability of fault detection is improved, but the response time is delayed

Engineering Contradiction:
Improvefault detection reliabilityVSAvoidtrip control response time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The trip determining unit performs preliminary evaluation by checking whether the first and second output signals are simultaneously received before starting the timing measurement. This preliminary action allows the system to quickly identify obvious fault conditions without waiting for the full predetermined period, thereby reducing response time while maintaining reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The timing mechanism is made dynamic by continuously monitoring the simultaneous reception of output signals during the predetermined period. If the signals remain simultaneous throughout the period, the trip control signal is output; otherwise, timing is stopped. This dynamic approach allows flexible response based on actual signal conditions.

Inventive Principle:
Principle #15Dynamics

2Speed

If the trip determining unit outputs the trip control signal when the first and second output signals are simultaneously received, then the response speed is improved, but erroneous operation due to surge signals increases

Engineering Contradiction:
Improvefault detection speedVSAvoidoperation accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The system performs preliminary verification by checking whether the simultaneous reception of first and second output signals is maintained throughout the predetermined period before outputting the trip control signal. This preliminary action prevents erroneous operation by surge signals that may cause temporary simultaneous signal reception, while still enabling fast response to genuine faults.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The trip determining unit continuously monitors the status of output signals during the predetermined period and uses this feedback to determine whether to output the trip control signal. If the simultaneous signal condition is not maintained throughout the period, the system feedbacks to stop timing and prevents erroneous tripping.

Inventive Principle:
Principle #23Feedback

3Reliability

If a predetermined period of 1 millisecond is used for timing, then the reliability of distinguishing fault from surge is improved, but the response time is excessively delayed

Engineering Contradiction:
Improvefault vs surge discriminationVSAvoidtrip control delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The trip determining unit performs preliminary evaluation of signal simultaneity before initiating the timing process. This preliminary action enables the system to quickly identify clear fault conditions and potentially complete the timing process faster than the full 1 millisecond, reducing delay while maintaining reliable discrimination capability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The timing process is made dynamic and adaptive rather than fixed. The actual timing duration may be shorter than 1 millisecond if the simultaneous signal condition is clearly met, allowing the system to respond faster to genuine faults while maintaining the reliability threshold for fault-surge discrimination.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP2728691B1Fault current detecting circuit
Publication Date: 2016.06.08 LSIS CO LTD
  • EP2728691B1 patent drawingFigure 1
  • EP2728691B1 patent drawingFigure 2
  • EP2728691B1 patent drawingFigure 3

AI summary

The fault current detecting circuit includes: a current detection unit (200) that outputs a current detection signal; a first comparing circuit unit (300) that compares the current detection signal with a predetermined reference current value and outputs a first output signal; a differentiator (400) that differentiates the current detection signal to output a change slope of the current detection signal; a second comparing circuit unit (500) that compares the change slope with a predetermined reference change slope value and outputs a second output signal; a third comparing circuit unit (700) that compares the current detection signal with a predetermined current detection limit reference value and outputs a third output signal; and a trip determining unit (600) that outputs a trip control signal only when the first output signal and the second output signal are maintained to be received and the third output signal is not received.