Fault Detection in Isolated Two-Switch Exciter Gate Drivers

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Solution Overview

Problem

Aircraft electrical power generation systems with dual gate driver integrated circuits can experience dormant faults where one switch remains coupled to either the high or low voltage rail, leading to increased stress and potential overheating in the exciter drive circuitry, despite maintaining regulated output voltage.

Innovation Solution

A fault detection system is implemented using a dual gate driver integrated circuit and a transformer-isolated two-switch exciter driver, which converts input signals into positive and negative exciter switch drive signals, generates a DC voltage signal based on the difference between these signals, and outputs a fault detection signal if the DC average voltage exceeds a threshold, indicating a fault in the gate drive integrated circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a dual gate driver integrated circuit is used to control the exciter drive, then the generator output voltage can be regulated properly, but dormant faults may occur where one switch remains coupled to either the high or low voltage rail, causing additional stress and potential overheating

Engineering Contradiction:
Improvegenerator output voltage regulationVSAvoidadditional stress and overheating in exciter drive circuitry
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The fault detection system performs preliminary monitoring by continuously comparing the DC-equivalent voltages of the positive and negative gate drive signals. This preliminary detection allows the system to identify dormant faults before they cause significant stress or overheating, enabling early intervention while the generator is still operating normally.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback by generating a fault detection signal based on the voltage difference comparison. When a discrepancy exceeds a predetermined threshold, the feedback mechanism triggers a fault indication, allowing the control system to respond appropriately and prevent further damage from dormant faults.

Inventive Principle:
Principle #23Feedback

2Device complexity

If fault detection is not implemented, then the system structure remains simple, but dormant faults can cause additional stress and potential damage to the exciter drive circuitry

Engineering Contradiction:
Improvesystem structureVSAvoidprotection against dormant faults
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The fault detection system is integrated into the existing gate driver circuitry, allowing the same hardware infrastructure to serve dual purposes: normal gate drive operation and fault detection. The comparison of DC-equivalent voltages uses the existing signal paths and components, minimizing additional complexity while adding protective functionality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system uses an intermediary measurement approach by comparing the DC-equivalent voltages of the gate drive signals rather than directly monitoring the switch states. This intermediary method provides fault detection capability without requiring direct access to the high-voltage switch nodes, simplifying the detection architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP3261215B1Fault detection system for isolated two-switch exciter drive gate driver
Publication Date: 2020.04.01 HAMILTON SUNDSTRAND CORP
  • EP3261215B1 patent drawingFigure 1
  • EP3261215B1 patent drawingFigure 2
  • EP3261215B1 patent drawingFigure 3A~3B

AI summary

A generator control unit (GCU) includes a fault detection system (201) configured to generate a direct current (DC) voltage signal based on a difference of a DC-equivalent voltage between the positive and negative exciter gate drive signals. The fault detection system further outputs a fault detection signal indicating the fault status of the gate drive integrated circuits based on a comparison between the DC average voltage signal and a threshold value.