Fault Diagnosis Resolution Prediction for Circuit Testing
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Solution Overview
Problem
In the context of circuit testing and fault diagnosis, existing methods face challenges in achieving high diagnosis resolution and accuracy, particularly in large circuits with billions of gates and scan cells, where defects are common and physical failure analysis is laborious and time-consuming.
Innovation Solution
A method involving a processor-based system that performs fault simulation, groups equivalent faults, computes a diagnosis resolution evaluation value, and determines whether to modify the circuit design or add test patterns to improve diagnosis resolution, using weighted sizes and exponential functions to prioritize fault groups.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If scan testing is employed to check large circuits with billions of gates and scan cells, then defect detection capability is improved, but physical failure analysis time and cost increase
Solution Approach 1:
The patent performs preliminary fault simulation and diagnosis resolution evaluation before actual physical failure analysis. By computing equivalent fault groups and their weighted sizes in advance, the system pre-identifies potential defect locations and prioritizes them, so that when a defect is detected during scan testing, the physical failure analysis can start with a focused set of high-probability locations rather than searching the entire circuit.
2Measurement precision
If diagnosis resolution is improved by using more test patterns, then defect location accuracy is improved, but test complexity and computation time increase
Solution Approach 1:
The patent changes the parameter of test pattern quantity by dynamically determining the optimal number of test patterns based on diagnosis resolution evaluation. Instead of using a fixed large number of test patterns, the system computes the evaluation value and adjusts the test pattern count to achieve sufficient diagnosis resolution with minimal test complexity. This parameter optimization resolves the contradiction between accuracy and complexity.
Solution Approach 2:
The patent replaces the mechanical approach of blindly increasing test pattern quantity with a computational approach. By substituting physical trial-and-error testing with fault simulation and mathematical computation of diagnosis resolution evaluation, the system achieves accurate defect location without proportionally increasing test complexity. The computational model predicts the effectiveness of test patterns before actual testing.
3Reliability
If fault simulation is performed on all faults in large circuits, then comprehensive defect coverage is improved, but computation resources and time increase
Solution Approach 1:
The patent segments the large set of faults into equivalent fault groups based on fault simulation results. Instead of treating each fault individually, faults that produce identical test responses are grouped together, and only one representative fault from each group needs full simulation. This segmentation dramatically reduces computation resources while maintaining comprehensive defect coverage, as the group representative captures the behavior of all equivalent faults.
Solution Approach 2:
The patent uses copying by creating equivalent fault groups where one fault copy represents multiple identical faults. Rather than simulating every single fault instance in the circuit, the system identifies faults with identical test response signatures and uses a single representative to stand in for the entire group. This copying approach preserves complete defect coverage information while reducing computational power requirements proportionally to the number of equivalent faults grouped together.
Data Source
AI summary
Various aspects of the disclosed technology relate to predicting physical failure analysis-oriented diagnosis resolution. Fault simulation is performed on a circuit design to derive test responses for a set of faults and test patterns for testing circuits fabricated according to the circuit design. The set of faults is grouped into groups of equivalent faults based on the test responses. A group of equivalent faults consists of faults having the same test responses for all test patterns in the test patterns that can activate the faults. A PFA (physical failure analysis)-oriented diagnosis resolution evaluation value is computed by averaging weighted sizes of the groups of equivalent faults. The weight factors for the groups of equivalent faults with sizes greater than a certain number being smaller than the weight factors for rest of the groups of equivalent faults.