Fault Injection Detection in Integrated Circuit Calculations
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Solution Overview
Problem
Electronic circuits performing iterative calculations, such as exponentiations and elliptic curve operations, are vulnerable to fault injection attacks that disrupt the operation to reveal secret quantities, particularly due to variations in execution time and disturbance detection challenges.
Innovation Solution
A method is introduced to detect disturbances by updating variables differently based on the even or odd character of coefficients in polynomial representations, with a comparison step to identify discrepancies, allowing for immediate action or modification of results to prevent exploitation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional iterative calculation methods are used for cryptographic operations, then calculation speed is maintained, but the circuit becomes vulnerable to fault injection attacks that can reveal secret quantities
Solution Approach 1:
The patent applies preliminary action by performing an initial calculation of the product AB before the iterative process, and storing it as a reference value. This preliminary computation enables subsequent verification of each iteration step without requiring complex real-time detection mechanisms, thus improving security while maintaining relatively simple device architecture
Solution Approach 2:
The patent implements feedback by continuously comparing the current iteration result with the expected value derived from the preliminary calculation. After each iteration where the current coefficient is even, the circuit computes a new product and compares it with the stored reference, providing immediate feedback to detect any fault injection attempts and terminate the calculation if discrepancies are found
2Reliability
If fault detection mechanisms are added to detect disturbances during calculation, then security against attacks is improved, but the calculation time increases
Solution Approach 1:
The patent applies partial action by performing verification only in specific iterations where the current coefficient is even, rather than checking every single step. This selective verification approach provides adequate security coverage while minimizing the time overhead associated with continuous monitoring, thus balancing detection capability with execution speed
3Measurement precision
If the calculation performs verification steps at each iteration, then disturbance detection is improved, but the execution speed decreases
Solution Approach 1:
By pre-calculating and storing the reference product AB before the iterative process begins, the patent eliminates the need for repeated full computations during verification. The preliminary action creates a reference that enables fast comparison operations in subsequent iterations, maintaining high detection precision while minimizing impact on execution speed
Solution Approach 2:
The patent performs verification only partially - specifically when the current coefficient is even - rather than at every iteration step. This selective approach provides sufficient disturbance detection precision for security purposes while significantly reducing the overall verification overhead and preserving calculation execution speed
Data Source
AI summary
A method for detecting a disturbance of a calculation, by an electronic circuit, of a result of an integral number of applications of an internal composition law on elements of an abelian group, by successive iterations of different steps according to the even or odd character of a current coefficient of a polynomial representation of said integral number, the degree of which determines the number of iterations, each iteration including: in case of an odd current coefficient, updating at least one first variable intended to contain the result at the end of the calculation; and in case of an even current coefficient, of updating a second variable and a comparison of this second variable with an expected value.