Cycle-Accurate Fault Log Modeling for Digital Systems
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Solution Overview
Problem
Existing fault log modeling techniques are inadequate in accurately modeling complex sequences of faults, particularly when multiple faults of different types occur in close temporal proximity, and fail to account for varying timing and logging delays, leading to inaccuracies in fault detection and logging logic validation.
Innovation Solution
A method and system that involve injecting faults into a digital system's data or control path, tracking each fault, synchronizing them at a predefined clock cycle based on logging delays, and generating a fault log model to accurately reflect the behavior and impact of each fault, while discarding unused faults to prevent skewing of the model.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If existing fault log modeling techniques are used to model simple isolated faults, then the modeling process is simple and fast, but the accuracy of modeling complex fault sequences occurring in close temporal proximity deteriorates
Solution Approach 1:
The patent segments the fault logging process into distinct phases: fault injection, individual fault tracking with separate threads, synchronization at predefined points, and model generation. This segmentation allows complex fault sequences to be handled systematically while maintaining modeling efficiency.
Solution Approach 2:
The patent performs preliminary actions by pre-defining synchronization points and logging delays before fault injection occurs. Tracking threads are spawned immediately upon fault injection, and the system proactively identifies and discards unused faults before they can skew the model, ensuring accurate fault log modeling for complex sequences.
2Measurement precision
If multiple faults are tracked and synchronized at predefined clock cycles, then the fault log modeling accuracy improves, but the device complexity increases
Solution Approach 1:
The patent introduces tracking threads as intermediary components that bridge fault injection and fault log generation. Each fault is assigned a dedicated tracking thread that monitors the fault through the system, synchronizes at predefined points, and contributes to the final fault log model. This intermediary layer manages complexity by providing a structured interface between multiple faults and the logging mechanism.
Solution Approach 2:
The patent changes the parameter of fault tracking from a monolithic approach to a threaded approach, where each fault is tracked independently with its own timing parameters. Synchronization points are defined based on logging delays specific to each fault type, allowing the system to handle varying fault characteristics without increasing overall system complexity.
3Adaptability or versatility
If all injected faults are included in the fault log model, then the model comprehensiveness is high, but the model accuracy deteriorates due to inclusion of unused faults
Solution Approach 1:
The patent implements a mechanism to identify and discard unused faults before they are incorporated into the fault log model. By actively monitoring which injected faults actually affect the system behavior and which are unused, the system discards the latter to prevent model skewing. This ensures the fault log model accurately reflects only the faults that had real impact on system operation.
Data Source
AI summary
A system and method for accurately modeling a fault log is provided for validating one or more elements of fault detection and logging logic for a real-time fault log of a digital system such as, for instance, a computer processor. The method includes injecting one or more known faults into a data path and/or a control path of the computer processor and spawning an individual tracking thread for each of the injected faults. The tracking threads may be synchronized at a predefined synchronization point that is selected as a function of a collective logging delay representing the time required for each of the injected faults to reach a real-time logging point within the computer processor. Once synchronized, the tracking threads may be input into a fault logging specification for fault behavior and/or system impact modeling and fault prioritization for use in generating a fault log model for comparison to the real-time fault log maintained within the computer processor.