Fault-Secure ECC Logic for Automotive Data Integrity

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Solution Overview

Problem

Error correcting code (ECC) logic is susceptible to faults, which can introduce errors into the code itself, leading to false detection and correction of data errors, compromising the integrity of data in electronic systems, including AI-based systems.

Innovation Solution

The implementation of fault-secure ECC logic designs that constrain hardware configurations and modify traditional computer code to detect and correct errors within the ECC logic, ensuring that errors are either corrected or identified as uncorrectable, thereby preventing their use in validating data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ECC logic is implemented to detect and correct data errors, then data integrity is improved, but the ECC logic itself becomes susceptible to faults that can introduce errors into the code

Engineering Contradiction:
Improvedata integrityVSAvoidECC logic faults
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary verification mechanism that checks whether the ECC code itself is valid before using it to validate data. This intermediary layer detects faults in the ECC logic by verifying the integrity of the code stored in memory, preventing faulty ECC logic from compromising data integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent performs preliminary verification of the ECC code before it is used for data validation. By checking the integrity of the ECC code in advance (before data processing), the system prevents faults in the ECC logic from affecting subsequent data operations.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If traditional ECC code is used without verification, then processing speed is maintained, but errors in the code can cause false detection and correction of data errors

Engineering Contradiction:
Improveprocessing speedVSAvoiderror correction accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements a self-verification mechanism where the ECC code automatically checks its own integrity. The system verifies whether the ECC code is valid before using it, allowing the code to self-diagnose potential faults without requiring external intervention, thus maintaining processing speed while improving reliability.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent introduces a feedback mechanism that verifies the validity of the ECC code before data validation. The system checks whether the code is intact and provides feedback on its validity, ensuring that only verified ECC logic is used for error detection and correction.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11494265B2Securing against errors in an error correcting code (ECC) implemented in an automotive system
Publication Date: 2022.11.08 NVIDIA CORP
  • US11494265B2 patent drawing
  • US11494265B2 patent drawing
  • US11494265B2 patent drawing

AI summary

In general, data is susceptible to errors caused by faults in hardware (i.e. permanent faults), such as faults in the functioning of memory and/or communication channels. To detect errors in data caused by hardware faults, the error correcting code (ECC) was introduced, which essentially provides a sort of redundancy to the data that can be used to validate that the data is free from errors caused by hardware faults. In some cases, the ECC can also be used to correct errors in the data caused by hardware faults. However, the ECC itself is also susceptible to errors, including specifically errors caused by faults in the ECC logic. A method, computer readable medium, and system are thus provided for securing against errors in an ECC.