Fault Tolerant Boot With Watchdog Error Recovery
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Solution Overview
Problem
Processor errors during start-up can lead to catastrophic failures, making it challenging to recover and result in longer boot times or total failure to boot, as existing technologies struggle to effectively detect and recover from errors during system boot-up.
Innovation Solution
A method that involves loading watchdog timer handler code into processor memory, executing it to detect catastrophic errors, and invoking a system management module to update error codes, while setting up a stack frame for error analysis and recovery using a dispatcher to resume the boot process, even in the presence of faulty components or software issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional boot process is used without error detection mechanisms, then the boot process is simple and fast, but catastrophic errors during start-up cause total failure to boot with no recovery capability
Solution Approach 1:
The patent applies preliminary action by executing watchdog timer handler code at the very beginning of the boot process, before the main system initialization. This early error detection mechanism is set up in advance to monitor subsequent boot operations, allowing the system to detect and handle catastrophic errors during start-up rather than failing silently. The watchdog timer is configured and started as one of the first actions in the boot sequence.
Solution Approach 2:
The patent introduces an intermediary error handling mechanism that acts as a mediator between the boot process and catastrophic failures. When errors are detected by the watchdog timer or during phase module execution, this intermediary layer captures error information, updates error codes in memory, and manages the transition to recovery procedures. This intermediary error handling system prevents direct catastrophic failure and enables controlled recovery.
2Reliability
If error detection and recovery mechanisms are implemented during boot, then fault tolerance is improved, but the boot process time increases due to additional error checking and handling steps
Solution Approach 1:
The patent segments the boot process into distinct phases (phase 0, phase 1, phase 2, etc.), with each phase having specific initialization tasks and error handling procedures. This segmentation allows the system to execute error detection and recovery operations in a structured manner, checking for errors at phase boundaries rather than continuously throughout the entire boot process. The phase dispatcher mechanism enables efficient transition between phases and facilitates targeted error handling at appropriate points in the boot sequence.
3Difficulty of detecting and measuring
If comprehensive error codes and diagnostic information are collected during boot failures, then diagnostic capability is improved, but the system complexity increases due to additional error code management and information storage requirements
Solution Approach 1:
The patent extracts error information and diagnostic data from the complex boot process and consolidates it into dedicated error code fields in memory structures. When errors are detected, the system extracts relevant error information and stores it in standardized error code formats at specific memory locations (such as in the error information record structure). This extraction approach separates diagnostic data collection from the main boot logic, making error management more systematic and less complex.
Data Source
AI summary
A method for processing data is provided that includes starting a processor from an off state and loading watchdog timer handler code into a processor memory. Executing the watchdog timer handler code and determining whether a catastrophic error has occurred during execution of the watchdog timer handler code. Invoking a system management module to update error code if it is determined that the catastrophic error has occurred and invoking a first phase dispatcher to set up a first stack frame associated with a first phase if it is determined that a catastrophic error has not occurred.