FBAR Package Structure With Organic Cavities and Filled Vias
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Solution Overview
Problem
Existing packaging solutions for FBAR resonators and filters are costly and have low yields, posing a challenge in the manufacturing process, especially when segmenting arrays of packaged components into individual components.
Innovation Solution
A method for fabricating packaged components involving steps such as obtaining an active membrane layer, depositing electrodes, patterning, and creating cavities, followed by selective application of passivation and conductive routes, to form a package that supports the active membrane with organic back ends and filled vias for efficient signal routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional packaging solutions are used for FBAR resonators, then the manufacturing process is simpler, but the yields are low and costs are high
Solution Approach 1:
The packaging process is divided into distinct stages: forming cavities in the carrier substrate, bonding the active membrane with electrodes to the carrier, patterning and filling vias, and applying passivation layers. This segmentation allows each step to be optimized independently, improving overall yield while managing complexity through systematic process breakdown.
Solution Approach 2:
The carrier substrate is prepared in advance with pre-formed cavities before the active membrane is bonded. The electrodes are deposited and patterned on the active membrane prior to bonding. These preliminary actions ensure proper alignment and reduce defects during assembly, thereby improving manufacturing yield.
2Reliability
If arrays of packaged components are segmented into individual components, then individual component performance is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The invention enables wafer-level packaging where arrays of components are individually encapsulated in separate cavities within the carrier substrate. This allows high-performance individual components to be manufactured in parallel arrays, maintaining manufacturing efficiency while achieving reliable individual component performance through isolated encapsulation.
Solution Approach 2:
The carrier substrate serves multiple functions: it provides mechanical support, defines individual cavities for each component, enables thermal management, and facilitates signal routing. The integrated design allows the carrier to automatically perform these functions during the packaging process, reducing additional manufacturing steps and maintaining ease of manufacture.
3Loss of energy
If filled vias are used for signal routing, then signal transmission efficiency is improved, but manufacturing steps increase
Solution Approach 1:
The via holes are formed and filled with conductive material before the final passivation layer is applied. This preliminary action ensures proper electrical connections are established early in the process, minimizing signal transmission losses while allowing subsequent steps to focus on protection and encapsulation, thereby managing overall manufacturing complexity.
Solution Approach 2:
The via formation, filling, and electrical connection processes are merged into a single integrated manufacturing sequence. The conductive material filling serves both as electrical interconnection and as part of the signal routing structure, reducing the need for separate connection steps and managing manufacturing complexity while improving signal transmission efficiency.
4Loss of energy
If organic back ends are used in the package, then bulk radiation losses are reduced, but manufacturing precision requirements increase
Solution Approach 1:
The organic back end material is applied and cured before final dicing of the individual components. This preliminary action ensures proper encapsulation and acoustic isolation are established while the components are still in arrays, reducing exposure to bulk radiation losses. The pre-encapsulation maintains manufacturing precision requirements at achievable levels while achieving the energy loss reduction benefits.
Solution Approach 2:
The organic back end material is applied as a thin film or layer that encapsulates the active membrane and electrodes. This thin film approach provides effective acoustic isolation and reduces bulk radiation losses while requiring less material and occupying less space, thereby managing manufacturing precision requirements more easily compared to thicker encapsulation methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances manufacturing yield and reduces costs by providing a reliable, high-performance packaging solution for FBAR resonators and filters, enabling efficient signal transmission and reducing bulk radiation losses.
Implementation Method 1
the active membrane layer comprises a piezoelectric material selected from the group comprising c-axis-oriented ScxAl(1-x)N henceforth ScAlN, c-axis-oriented AlxGa(1-x)N henceforth AlGaN, AlN, BaxSr(1-x)TiO3 henceforth BST
Implementation Method 2
a front electrode onto the front of the active membrane layer... a back electrode layer... on the thus exposed back surface of the active membrane
Data Source
AI summary
A package for an electronic component, the package comprising a front end, a back end, and an active membrane layer sandwiched between front and back electrodes of conducting material; wherein front electrode has a surface that extends beyond an adjacent surface of the active membrane layer, the active membrane mechanically supported by the front end and covered by a back end comprising at least one back cavity having organic walls and lid of organic material, with filled through vias traversing the organic walls and lid for coupling to the electrodes by an internal routing layer; the vias being coupleable by external solderable bumps to a circuit board for coupling the package in a flip chip configuration.


