Far Back End of Line Stack Encapsulation for Wet Etching

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Solution Overview

Problem

Semiconductor BEOL structures are vulnerable to damage from wet etching due to their porosity and limited thermal budget, making it difficult to perform wet processing without causing damage during the back end of the line (BEOL) fabrication.

Innovation Solution

A method involving the formation of conformal protection layers at low temperatures to encapsulate BEOL structures, allowing for the use of wet etching by creating an encapsulation boundary that protects the sensitive materials, including the use of a first conformal protection layer followed by a second layer to ensure protection and enable further processing without thermal damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If wet etching is used in BEOL processing, then processing flexibility is improved, but BEOL structures are damaged due to porosity and poor resistance to wet etchant

Engineering Contradiction:
Improveprocessing flexibilityVSAvoidBEOL structure integrity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

A conformal protection layer is deposited over the BEOL structures before wet etching is performed. This preliminary protective action prevents the wet etchant from damaging the porous BEOL materials, allowing wet etching to be used for processing flexibility while maintaining structure integrity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The conformal protection layer acts as an intermediary barrier between the wet etchant and the BEOL structures. It allows the wet etching process to proceed on exposed surfaces while protecting the underlying porous BEOL materials from chemical damage.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If thermal processing is applied to BEOL structures, then material properties are improved, but thermal damage occurs due to limited thermal budget

Engineering Contradiction:
Improvematerial propertiesVSAvoidthermal damage
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The conformal protection layer is deposited in advance to provide thermal protection to the BEOL structures. This preliminary protective measure allows subsequent thermal processing to improve material properties without causing thermal damage to the temperature-sensitive BEOL materials.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protection layer serves as a thermal buffer or cushion that absorbs and distributes thermal energy, preventing direct thermal damage to the BEOL structures during processing operations that require elevated temperatures.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If conformal protection layers are deposited to protect BEOL structures, then structure protection is improved, but process complexity increases

Engineering Contradiction:
Improvestructure protectionVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The conformal protection layer is deposited using controlled parameters (thickness, material composition, deposition temperature) that optimize protection effectiveness while minimizing the number of additional process steps. By carefully controlling these parameters, structure protection is achieved without unnecessarily increasing process complexity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively protects BEOL structures during wet processing, enabling the use of wet etching while maintaining the integrity of the semiconductor device by preventing thermal damage and ensuring the protection of both horizontal and vertical surfaces.

Implementation Method 1

depositing a first conformal protection layer on the patterned layer

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

depositing a first conformal protection layer on the patterned layer

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 3

forming an encapsulation boundary to protect at least the patterned layer and a portion of the BEOL stack

Methodology Applied
Scientific EffectPhysical containment: Physical Containment

Data Source

PatentUS8994177B2Far back end of the line stack encapsulation
Publication Date: 2015.03.31 GLOBALFOUNDRIES US INC
  • US8994177B2 patent drawing
  • US8994177B2 patent drawing
  • US8994177B2 patent drawing

AI summary

A method for far back end of the line (FBEOL) protection of a semiconductor device includes forming a patterned layer over a back end of the line (BEOL) stack, depositing a first conformal protection layer on the patterned layer which covers horizontal surfaces of a top surface and sidewalls of openings formed in the patterned layer. A resist layer is patterned over the first conformal protection layer such that openings in the resist layer correspond with the openings in the patterned layer. The first conformal protection layer is etched through the openings in the resist layer to form extended openings that reach a stop position. The resist layer is removed, and a second conformal protection layer is formed on the first conformal protection layer and on sidewalls of the extended openings to form an encapsulation boundary to protect at least the patterned layer and a portion of the BEOL stack.