Host Bus Adaptor Logical Channel Bandwidth Allocation

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Solution Overview

Problem

Conventional Fibre Channel (FC) networks struggle to provide differentiated quality of service (QoS) to various data flows sharing the same inter-switch link, leading to network congestion and underutilization due to their limited ability to distinguish and prioritize data frames from different virtual servers and applications.

Innovation Solution

The system allocates bandwidth on an FC link into logical channels with dedicated buffers, allowing for weighted round-robin data frame transmission and associating data frames with specific QoS classes, enabling differentiated QoS provisioning to physical and virtual appliances, applications, and sub-application message groups through virtual channels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional FC networks use a single shared buffer for all data flows on an inter-switch link, then the system structure remains simple, but differentiated QoS cannot be provided leading to network congestion and underutilization

Engineering Contradiction:
ImproveQoS differentiationVSAvoidbuffer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the single shared buffer into multiple virtual channels, each with its own dedicated buffer. This segmentation allows different data flows to be isolated and prioritized independently, enabling QoS differentiation while maintaining manageable complexity through structured organization of buffer resources.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by assigning different QoS characteristics to different virtual channels. Each virtual channel can have customized buffer sizes, priority levels, and transmission weights tailored to specific application requirements, allowing localized optimization of QoS properties without affecting the entire system uniformly.

Inventive Principle:
Principle #3Local quality

2Reliability

If FC networks allocate dedicated buffers for each data flow to enable QoS differentiation, then differentiated QoS can be provided, but the device complexity and resource overhead increase

Engineering Contradiction:
ImproveQoS provisioningVSAvoidbuffer resources
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent makes buffer resources universal by allowing virtual channels to dynamically share the physical link bandwidth. While each virtual channel has dedicated buffer space, the underlying physical resources (link bandwidth, switch fabric) remain shared and can be allocated flexibly based on current network conditions and QoS requirements, maximizing resource utilization.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes buffer allocation parameters dynamically through weighted round-robin scheduling and credit-based flow control. Buffer sizes, transmission weights, and priority levels can be adjusted based on traffic patterns and QoS requirements, allowing efficient resource allocation without requiring static over-provisioning of buffer resources for each virtual channel.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If FC networks use basic patch-panel switching functions, then the switch fabric remains simple, but it cannot meet the demands of heterogeneous and dynamic network environments with multiple QoS requirements

Engineering Contradiction:
ImproveQoS supportVSAvoidswitch fabric
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces dynamics into the switch fabric by implementing virtual channel establishment, dynamic buffer allocation, and weighted round-robin scheduling. The switch can adaptively manage multiple virtual channels with different QoS parameters, allowing the fabric to respond to changing network conditions and application requirements while maintaining a structured underlying architecture.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses virtual channels as intermediaries between the simple physical link layer and the complex QoS requirements of applications. Virtual channels provide an abstraction layer that translates diverse QoS demands into manageable scheduling and buffer allocation decisions, protecting the underlying switch fabric from excessive complexity while enabling sophisticated QoS control.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If multiple data flows with different QoS requirements share the same inter-switch link without logical channel division, then the link utilization remains high, but network congestion occurs and QoS differentiation is lost

Engineering Contradiction:
ImproveQoS levelsVSAvoidlink utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the shared inter-switch link into multiple virtual channels, each handling specific data flows with defined QoS requirements. This segmentation prevents congestion in one channel from affecting others, ensuring maintained link utilization through parallel processing of multiple flows while preserving QoS differentiation through isolated buffer management and weighted scheduling.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9524182B2Method and system for facilitating application-oriented quality of service in a Fibre Channel network
Publication Date: 2016.12.20 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US9524182B2 patent drawing
  • US9524182B2 patent drawing
  • US9524182B2 patent drawing

AI summary

One embodiment of the present invention provides a system that facilitates quality of service (QoS) in a Fiber Channel (FC) network. During operation, a host bus adaptor (HBA) allocates the bandwidth on an FC link between the HBA and an FC switch into a plurality of logical channels, wherein a respective logical channel can transport data frames of variable length. Furthermore, a respective logical channel is associated with a dedicated buffer on the HBA. The HBA associates data frames from a logical entity associated with the HBA with a logical channel, and transmits data frames from the logical entity to the FC switch on the corresponding logical channel within the link from the HBA to the FC switch.