FCML Rectifier Modulation for Full-Range Zero-Voltage Switching
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Solution Overview
Problem
Existing flying capacitor multi-level (FCML) converters face challenges in achieving zero-voltage switching (ZVS) over the entire operating range due to inductor current ripple collapse at specific duty cycles, particularly with phase-shifted modulation schemes, leading to undesirable transients and operational challenges.
Innovation Solution
A FCML rectifier with a control method that employs first and second modulation schemes to achieve ZVS by synchronizing rising edges of control signals and adjusting phase-shift and switching frequency, utilizing redundant switching states to manage inductor current ripple and minimize conduction losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If phase-shifted modulation scheme is used in FCML converters, then device voltage stress is reduced and effective frequency is increased, but inductor current ripple collapses at specific duty cycles causing ZVS to become unachievable
Solution Approach 1:
The patent implements dynamic level selection that adapts the converter operation between different switching states based on the instantaneous duty cycle. When the duty cycle approaches critical values where current ripple would collapse, the system dynamically transitions to alternative switching states that maintain sufficient current ripple for ZVS, thus making the system adaptive to varying operating conditions.
Solution Approach 2:
The patent changes the switching pattern and level selection parameters dynamically based on the duty cycle. By monitoring the duty cycle and adjusting the switching states accordingly, the system maintains adequate inductor current ripple even when operating near critical duty cycle values, enabling ZVS to be achieved across the entire operating range.
2Stability of the object's composition
If phase-shifted modulation scheme is used in FCML converters, then flying capacitor voltage is balanced, but inductor current ripple becomes zero at certain duty cycles leading to operational challenges
Solution Approach 1:
The system dynamically adjusts the switching pattern based on the duty cycle. When approaching critical duty cycle values where current ripple would become zero, the controller dynamically selects alternative switching states that maintain non-zero current ripple, ensuring continuous and reliable operation throughout the entire duty cycle range while preserving flying capacitor voltage balance.
Solution Approach 2:
The patent employs predictive control that anticipates when the duty cycle will approach critical values where current ripple collapse would occur. By proactively switching to alternative operating states before the critical point is reached, the system prevents operational disruptions and maintains smooth transitions, ensuring continuous reliable operation.
3Device complexity
If standard phase-shifted modulation is used, then converter structure is simple, but ZVS cannot be achieved over the entire operating range due to current ripple collapse
Solution Approach 1:
While maintaining the relatively simple FCML converter structure, the patent introduces dynamic level selection that adapts the switching pattern based on the duty cycle. This dynamic control mechanism enables full-range ZVS achievement without significantly complicating the overall converter architecture, as the control logic adds minimal complexity while delivering substantial performance improvement.
Data Source
AI summary
FCML rectifiers and control methods thereof are provided. The FCML rectifier operates with an input voltage and includes an inductor, a plurality of upper switches, and a plurality of lower switches. The upper and lower switches are electrically connected in series. The inductor is coupled between the input voltage and a midpoint between the upper switches and the lower switches. During critical transition points, at least one of first and second modulation schemes is performed. In the first modulation scheme, any rising edge of the control signal of any one lower switch is controlled to be synchronous with a rising edge of the control signal of at least one another lower switch for achieving ZVS. In the second modulation scheme, a phase-shift of the control signals and a switching frequency are controlled to achieve ZVS with minimum conduction loss.