Dielectric Layer Fabrication via FCVD and Oxygen Plasma

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Solution Overview

Problem

The existing shallow trench isolation (STI) processes in semiconductor manufacturing face challenges such as defects, voids, and surface damage during etching and cleaning processes, leading to current leakage and reduced isolation effectiveness.

Innovation Solution

A method involving chemical mechanical polishing (CMP) followed by a surface treatment with oxygen plasma is employed to form a dielectric layer using flowable chemical vapor deposition (FCVD), which fills high aspect ratio recesses without voids and enhances structural density by crosslinking dangling bonds, thereby improving the dielectric layer's completeness and isolation performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional CVD process is used to deposit dielectric layer in high aspect ratio recesses, then the recess can be filled, but overhang at top corner and voids are generated

Engineering Contradiction:
Improvefilling completenessVSAvoiddefect formation
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent changes the deposition parameters by using flowable CVD process with controlled flow rate and pressure conditions, allowing the dielectric material to flow into high aspect ratio recesses without forming overhangs or voids, achieving complete filling while maintaining structural integrity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces conventional CVD deposition mechanism with flowable CVD process, where the dielectric material is deposited in a flowable state that can conformally coat the recess walls and fill the entire volume without requiring high temperature or pressure conditions that cause overhang formation

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If multiple etching and cleaning processes are performed during manufacturing, then transistor components can be processed, but the exposed STI is damaged forming breaks and spaces

Engineering Contradiction:
Improveprocess completionVSAvoidSTI integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs preliminary action by depositing an protective dielectric layer over the STI structure before the multiple etching and cleaning processes, creating a protective barrier that prevents damage to the STI during subsequent manufacturing steps

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent provides beforehand cushioning by forming a protective dielectric layer that absorbs and distributes the mechanical and chemical stress from subsequent etching and cleaning processes, preventing direct damage to the STI structure

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Manufacturing precision

If dielectric layer surface is left as-is after CMP process, then planarization is achieved, but surface defects and current leakage occur in subsequent processes

Engineering Contradiction:
Improvesurface flatnessVSAvoidisolation effectiveness
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies continuous useful action by performing oxygen plasma treatment immediately after the CMP process while the surface is still fresh and reactive, ensuring continuous protection and densification without interrupting the manufacturing flow, thereby preventing surface defects and maintaining isolation effectiveness

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively prevents defects and surface damage during subsequent processes, ensuring complete filling of recesses and maintaining structural integrity and isolation effectiveness of the dielectric layer.

Implementation Method 1

a surface treatment process is performed on the dielectric layer after the chemical mechanical polishing process, and the surface treatment process includes introducing an oxygen plasma

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 2

oxygen radicals into a part of the dielectric layer, therefore, the dangling bonds in the dielectric layer may crosslink

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 3

a chemical mechanical polishing (CMP) process is performed on the dielectric layer

Methodology Applied
Scientific EffectChemical mechanical polishing:

Implementation Method 4

Flowable chemical vapor deposition (FCVD) process is performed to form the dielectric layer

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS8927388B2Method of fabricating dielectric layer and shallow trench isolation
Publication Date: 2015.01.06 UNITED MICROELECTRONICS CORP
  • US8927388B2 patent drawing
  • US8927388B2 patent drawing
  • US8927388B2 patent drawing

AI summary

A method of fabricating a dielectric layer includes the following steps. At first, a dielectric layer is formed on a substrate, and a chemical mechanical polishing (CMP) process is performed on the dielectric layer. Subsequently, a surface treatment process is performed on the dielectric layer after the chemical mechanical polishing process, and the surface treatment process includes introducing an oxygen plasma.