FD-SOI Delay Cell Body Bias for Stable DLL and PLL Timing
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Solution Overview
Problem
Contemporary semiconductor devices face challenges in designing delay cells, delay locked loop (DLL) circuits, and phase locked loop (PLL) circuits that are tolerant to variations in power supply voltages, making it difficult to maintain robust operation across a broad range of voltage levels.
Innovation Solution
The use of fully depleted silicon-on-insulator (FD-SOI) structure transistors in delay cells, where control voltages are applied to the body of the transistors to adjust the delay time, allowing for robust operation across a wide range of power supply voltages by controlling the threshold voltage of the transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional transistors are used in delay cells, then the circuit can operate at standard power supply voltages, but the delay time becomes highly sensitive to power supply voltage variations
Solution Approach 1:
The patent applies body bias voltage to the FD-SOI transistors to dynamically adjust the threshold voltage parameter. By changing the body voltage (Vb), the threshold voltage (Vth) is modulated, which in turn controls the delay time of the delay cell. This parameter change approach enables the circuit to maintain stable delay characteristics across varying power supply voltages, resolving the contradiction between reliability and ease of operation.
2Adaptability or versatility
If the power supply voltage range is expanded, then the circuit becomes more versatile, but the delay time control becomes less precise
Solution Approach 1:
The patent introduces body bias voltage as an intermediary control parameter between the power supply voltage and the delay time. The body voltage acts as a mediator that decouples the direct relationship between power supply variations and delay time. By controlling the body bias independently, the circuit achieves precise delay time control even when operating across a wide voltage range, thus resolving the contradiction between adaptability and manufacturing precision.
3Adaptability or versatility
If FD-SOI transistors with body bias control are used, then delay time can be adjusted over wide voltage ranges, but the device structure becomes more complex
Solution Approach 1:
The patent utilizes the segmented structure of FD-SOI transistors, which separate the body region from the source and drain regions through an insulating layer. This segmentation allows independent control of the body voltage, enabling threshold voltage modulation without affecting the basic transistor operation. The segmented structure provides the necessary degrees of freedom for wide voltage range operation while maintaining a relatively simple device architecture, thus resolving the contradiction between adaptability and device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables delay cells, DLL circuits, and PLL circuits to maintain stable operation and adjust delay times effectively even under fluctuating power supply conditions, providing a robust operating margin and improved tolerance to voltage variations.
Implementation Method 1
each of the first and second transistors has a fully depleted silicon-on-insulator (FD-SOI) structure, and at least one of a first control voltage is applied to a body of the first transistor and a second control voltage is applied to a body of the second transistors to adjust a delay time of the delay cell
Data Source
AI summary
A delay cell includes a first transistor and a second transistor, at least one of which has a fully depleted silicon-on-insulator (FD-SOI) structure. A first control voltage is applied to the body of the first transistor and a second control voltage is applied to the body of the second transistors in order to adjust the delay time of the delay cell. DLL and PLL circuits includes this type of delay cell.