FD-SOI Transistor PUF Identifier Stability
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Solution Overview
Problem
Existing Physically Unclonable Function (PUF) solutions for electronic devices are unstable over time and sensitive to temperature, voltage, and current variations, and are vulnerable to physical attacks and modeling, leading to predictability and security risks.
Innovation Solution
Intentionally doping the channels of MOSFET transistors with a low concentration of dopants, such as phosphorus or boron, to increase mismatch between transistors, making the identifier more stable and reducing predictability, while using FD-SOI transistors on a silicon-on-insulator substrate to enhance security against cloning and modeling attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory elements (SRAM cells) are used to generate the identifier, then identification is achieved, but the identifier becomes sensitive to variations in current, voltage, and temperature
Solution Approach 1:
The patent changes the physical parameters of the transistors by intentionally doping the channel with dopants of the same type as source and drain regions. This modifies the electrical characteristics (threshold voltage, conductance) to create stable mismatch-based identifiers that are less sensitive to operational variations
2Measurement precision
If memory elements are used for identification, then an identifier can be generated, but significant error correction codes and post-processing algorithms are required which increase complexity and security vulnerabilities
Solution Approach 1:
By changing the transistor parameters through intentional doping, the patent achieves more stable and distinguishable electrical characteristics, reducing measurement errors and the need for complex error correction
Solution Approach 2:
The patent extracts the identification function directly from the intrinsic electrical characteristics of doped transistors, eliminating the need for separate error correction codes and post-processing algorithms that were required in memory-element-based approaches
3Reliability
If ring oscillators are used for identification, then unique delay characteristics are obtained, but the measured delay is unstable particularly in temperature
Solution Approach 1:
The patent changes the transistor parameters through intentional doping to create mismatch-based identifiers that are inherently more stable across temperature variations compared to ring oscillator delay measurements
4Reliability
If memory cells are used for PUF identification, then identification is achieved, but invasive attacks can clone these memory cells
Solution Approach 1:
The patent changes the transistor parameters through intentional doping to create unique, physically unclonable characteristics that are difficult to replicate, enhancing security against cloning attacks
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a stable and unpredictable identifier that reduces the need for error correction codes and enhances security by increasing the mismatch between transistors, making it harder to clone or model the device, thus improving the integrity and security of the identification process.
Implementation Method 1
During a step of implanting doping atoms in the channels of the MOSFET transistors, means for increasing the random parametric variations are applied
Implementation Method 2
During a step of implanting doping atoms in the channels of the MOSFET transistors
Data Source
Figure 1
Figure 2A~2D
Figure 3
AI summary
Electronic device (100) comprising at least: - a plurality of FD-SOI type MOSFET transistors (102), among which first transistors (104) are such that each first transistor has a channel in which a concentration of dopants of the same type as those present in the source and drain of said first transistor is greater than that in the channel of each of the other transistors of said plurality of transistors; and - an identification circuit (106) capable of determining a unique identifier of the electronic device from at least one intrinsic electrical characteristic of each of the first transistors, the value of which depends at least in part on the conductance of said first transistor; and in which a gate of each of the first transistors has a length less than or equal to about 20 nm.