FDSOI Transistor Source-Drain Recrystallization
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Solution Overview
Problem
In the manufacturing of FDSOI transistors, existing methods face challenges in creating abrupt source-channel and drain-channel junctions close to the channel while preventing dopant diffusion, maintaining high-quality crystalline structure, and avoiding capacitive issues, especially with thin semiconductor layers and complex ion implantation processes.
Innovation Solution
A method involving the creation of a thin first dielectric spacer, amorphization and doping of semiconductor regions, followed by recrystallization to activate dopants, and subsequent removal of the first portions to form a thicker second dielectric spacer, allowing for doped semiconductor formation adjacent to the channel without damaging the crystalline structure and reducing capacitive problems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high temperature annealing is used to activate dopants, then dopant activation is achieved, but dopant diffusion in the channel occurs
Solution Approach 1:
The invention changes the temperature parameter from high temperature annealing (>1000°C) to low temperature processing (<700°C, preferably 400-600°C). This parameter change enables dopant activation through an alternative mechanism (solid phase epitaxial recrystallization) that does not rely on thermal diffusion, thereby preventing dopant migration in the channel while maintaining effective dopant activation in the source and drain regions.
Solution Approach 2:
The invention replaces the thermal activation mechanism with a solid phase epitaxial recrystallization mechanism. Instead of using high temperature thermal energy to activate dopants, the process uses controlled recrystallization of the amorphous semiconductor layer at lower temperatures, which activates dopants through the recrystallization front propagation rather than thermal diffusion.
2Manufacturing precision
If ion implantation is used to create abrupt junctions close to the channel, then junction abruptness is improved, but crystalline structure damage occurs
Solution Approach 1:
The invention performs preliminary amorphization of the semiconductor layer in the source and drain regions through ion implantation before dopant activation. This preliminary action creates a controlled amorphous structure that can be subsequently recrystallized, allowing dopants to be activated during the recrystallization process without requiring high temperature annealing that would cause unwanted diffusion. The amorphization is confined to specific regions, preserving the crystalline structure where needed.
Solution Approach 2:
The invention utilizes the phase transition from amorphous to crystalline state through solid phase epitaxial recrystallization. The ion implantation first transforms the crystalline semiconductor into an amorphous state in the source and drain regions, and then controlled recrystallization at low temperatures activates dopants during this phase transition, avoiding the need for high temperature processing that would damage the crystalline structure or cause dopant diffusion.
3Productivity
If thin semiconductor layers are used for FDSOI transistors, then device performance is improved, but controlling amorphisation depth becomes difficult
Solution Approach 1:
The invention applies local quality by performing selective amorphization only in the source and drain regions through targeted ion implantation, rather than amorphizing the entire thin semiconductor layer. This localized approach allows precise control over which portions of the thin layer become amorphous, enabling subsequent selective recrystallization and dopant activation in the source and drain regions while preserving the crystalline structure in the channel region, thus maintaining device performance with precise manufacturing control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables doped semiconductor formation throughout the thickness of the source and drain, preventing dopant diffusion into the channel, maintaining high dopant activation levels, and avoiding capacitive issues, regardless of the transistor's active zone thickness, including in FDSOI transistors with thin layers.
Implementation Method 1
amorphising species (usually in two distinct implantation steps) destroying the crystalline structure of the semiconductor in which this implantation is made and making it amorphous
Implementation Method 2
The amorphous semiconductor is then recrystallised at low temperature (usually less than about 700° C. and for example between about 400° C. and 600° C.)
Implementation Method 3
annealing must be done at high temperature (usually more than about 1000° C.), which cause diffusion of dopants in the channel
Data Source
AI summary
Method of making a transistor, comprising the following steps:make a gate and a first spacer on a first channel region of a first crystalline semiconducting layer;make first crystalline semiconductor portions on the second source and drain regions;make the second regions amorphous and dope them;recrystallise the second regions and activate the dopants present in the second regions;remove the first portions;make a second spacer thicker than the first spacer;make second doped crystalline semiconductor portions on the second regions, said second portions and the second regions of the first layer together form the source and drain of the transistor.