FDSOI High-Voltage Transistor Layout Using Buried Oxide and Trenches
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
It is challenging to form high-voltage transistors on fully-depleted semiconductor-on-insulator (FDSOI) substrates that are compatible with the fabrication processes for low-voltage transistors, leading to increased time and cost in integrated circuit (IC) structure fabrication.
Innovation Solution
A semiconductor-on-insulator (SOI) substrate structure is developed, where a high-voltage transistor has a gate electrode on the buried insulator layer and source and drain in the base semiconductor layer, with trench isolations, and a low-voltage transistor has a source and drain over the buried insulator layer, allowing for fully compatible processes without additional masks, thus simplifying the fabrication and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If high-voltage transistors are formed on FDSOI substrates using conventional processes, then high-voltage operation is achieved, but additional processing steps and masks are required, increasing fabrication time and cost
Solution Approach 1:
The patent makes the buried insulator layer serve dual functions: as the gate dielectric for low-voltage transistors and as the gate dielectric for high-voltage transistors. This eliminates the need for separate processing steps and masks to form high-voltage devices on FDSOI substrates, allowing both voltage regimes to be implemented using the same fabrication process flow.
Solution Approach 2:
The patent segments the high-voltage transistor structure by forming source and drain regions in the base semiconductor layer beneath the buried insulator layer, with trench isolations created within these regions. This segmentation allows the high-voltage transistor to be integrated alongside low-voltage transistors without interfering with the low-voltage device fabrication process.
2Use of energy by moving object
If additional processing steps are added to form high-voltage transistors on FDSOI substrates, then high-voltage capability is achieved, but fabrication time and cost increase
Solution Approach 1:
The buried insulator layer is designed to function as the gate dielectric for both low-voltage and high-voltage transistors. By making this layer thick enough to support high-voltage operation while maintaining its role as the gate dielectric for standard low-voltage devices, the patent eliminates the need for additional processing steps and masks that would otherwise be required to create high-voltage devices on FDSOI substrates.
Solution Approach 2:
The patent performs preliminary actions by forming the trench isolations and source/drain regions in the base semiconductor layer before completing the low-voltage transistor fabrication. This preliminary structuring of the high-voltage transistor regions allows subsequent low-voltage processing to proceed without interruption, thereby reducing overall fabrication time.
3Productivity
If high-voltage transistors are integrated with low-voltage transistors on FDSOI substrates, then operational efficiency is enhanced, but device complexity increases
Solution Approach 1:
The patent applies local quality by creating trench isolations specifically within the source and drain regions of high-voltage transistors, while low-voltage transistors maintain their conventional structure. This localized modification allows high-voltage operation in specific regions without complicating the overall device architecture or requiring complex structures across the entire integrated circuit.
Solution Approach 2:
The patent resolves complexity by transitioning to another dimension - forming source and drain regions in the base semiconductor layer (third dimension beneath the buried insulator) rather than only in the SOI layer. This vertical dimensionality allows high-voltage transistor functionality to be achieved without increasing lateral complexity or interfering with low-voltage device structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This structure enables high-voltage transistors to operate up to 25 Volts while maintaining high performance, reducing switching time, and simplifying analog circuit designs by integrating high-voltage transistors with low-voltage transistors on FDSOI technology without additional processing steps or masks, thereby reducing fabrication costs and enhancing operational efficiency.
Implementation Method 1
forming a gate electrode in the semiconductor region and the SOI layer using the buried insulator layer as a gate dielectric for the gate electrode
Implementation Method 2
a trench isolation in each of the source and the drain of the first FET
Data Source
AI summary
A structure including a semiconductor-on-insulator (SOI) substrate. The SOI substrate includes an SOI layer over a buried insulator layer over a base semiconductor layer. The structure includes a high-voltage first field effect transistor (FET) adjacent to a high performance, low voltage second FET. The high voltage FET has a gate electrode on the buried insulator layer, and a source and a drain in the base semiconductor layer under the buried insulator layer. Hence, the buried insulator layer operates as a gate dielectric for the high voltage FET. The low voltage FET has a source and a drain over the buried insulator layer, i.e., in the SOI layer. A trench isolation is in each of the source and the drain of the first, high voltage FET. The source of the high voltage FET surrounds the trench isolation therein.