FDSOI Manufacturing Trench Etching for Flat Epitaxial Growth
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Solution Overview
Problem
The existing methods for manufacturing FDSOI devices face issues with surface defects due to high bump formation during silicon epitaxial growth, which affect subsequent processes and reduce the process window.
Innovation Solution
A method involving a semiconductor structure with a silicon substrate, buried oxide layer, silicon-on-insulator layer, and hard mask layer, where plasma anisotropic and isotropic etching are used to form a bulk silicon region trench, followed by silicon epitaxial growth, ensuring the epitaxial layer is flush with the silicon-on-insulator layer to prevent surface bumps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If silicon epitaxial growth is performed in the bulk silicon region of the existing FDSOI substrate, then the silicon epitaxial layer is formed, but a defect bump more than 200 Å high is formed on the SOI surface making the surface uneven
Solution Approach 1:
The patent applies preliminary action by performing etching to form a trench in the bulk silicon region before performing silicon epitaxial growth. This pre-preparation of the trench structure prevents the formation of surface bumps during epitaxy, as the silicon atoms deposit into the trench rather than forming protrusions on the existing surface. The trench acts as a pre-configured receptacle that guides the epitaxial growth to occur at the trench bottom, ensuring a flat final surface.
Solution Approach 2:
The patent applies preliminary anti-action by using etching to remove material and create a depression (trench) in advance, which counteracts the tendency of epitaxial growth to form bumps. By creating this negative space beforehand, the subsequent epitaxial deposition fills the trench rather than adding to surface height, thereby preventing the harmful bump formation that would otherwise occur during the epitaxial process.
2Manufacturing precision
If the silicon-on-insulator layer is shrunk by etching, then the surface bump is controlled, but the process complexity increases
Solution Approach 1:
The patent applies the taking out principle by extracting or removing the problematic bulk silicon material through etching to create a trench. This removal of excess material prevents bump formation during subsequent epitaxial growth. The etching step extracts the unnecessary silicon that would otherwise lead to surface protrusions, leaving a controlled trench structure that guides平整 epitaxial deposition.
3Manufacturing precision
If a hard mask layer is added for etching protection, then the etching precision is improved, but the manufacturing steps increase
Solution Approach 1:
The patent applies the intermediary principle by introducing a hard mask layer as a mediator between the etching process and the silicon structures. This hard mask layer serves as a protective intermediary that enables precise etching of the trench while protecting the silicon-on-insulator layer and other sensitive structures from damage. The hard mask acts as a temporary intermediary structure that facilitates controlled material removal and can be removed afterward, enabling precision etching despite the added step.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach eliminates surface bumps, broadens the process tolerance, reduces defects, and enhances device performance and yield by maintaining a smooth silicon-on-insulator surface.
Implementation Method 1
performing plasma anisotropic etching on the bulk silicon region to open a part of the buried oxide layer
Implementation Method 2
performing isotropic etching, so that the silicon-on-insulator layer shrinks in the horizontal direction
Implementation Method 3
performing silicon epitaxial growth in the bulk silicon region trench
Data Source
AI summary
The present application provides a method for manufacturing FDSOI devices. The method includes steps of: providing a semiconductor structure which comprises a silicon substrate, a buried oxide layer on the silicon substrate, a silicon-on-insulator layer on the buried oxide layer; and a hard mask layer on the silicon-on-insulator layer; performing spin coating of a photoresist on the hard mask layer to form a bulk silicon region; performing plasma anisotropic etching on the bulk silicon region to open a part of the buried oxide layer, and then performing isotropic etching, so that the silicon-on-insulator layer shrinks in the horizontal direction; performing plasma anisotropic etching to etch through the buried oxide layer to form a bulk silicon region trench; performing silicon epitaxial growth in the bulk silicon region trench. The silicon-on-insulator layer is still shrinks after the bulk silicon region trench is formed, as the result, there is no bump on the surface of the silicon-on-insulator layer, thus the process window becomes controllable.