FDSOI Back-Bias Contact Via Buried Insulator

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Solution Overview

Problem

Existing FDSOI devices face challenges in integrating back-bias contact structures at advanced technology nodes, such as 28 nm and beyond, while maintaining high integration density and minimizing the area required for back-bias contact formation.

Innovation Solution

The semiconductor device structure includes a contact structure with contact elements that extend through the buried insulating material layer to electrically contact the base semiconductor material, allowing for compact FDSOI devices with improved back-bias contact integration, where the active semiconductor layer is selectively removed at one side of the gate structure to facilitate direct contact with the base semiconductor material.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional back-bias contact structures are used in FDSOI devices, then electrical contact to the base substrate is achieved, but the area required for contact formation increases, reducing integration density

Engineering Contradiction:
Improveelectrical contactVSAvoidcontact area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The contact structure transitions from a planar lateral contact to a vertical through-contact that extends through the buried insulating layer. This dimensional change allows electrical contact to be achieved through the depth of the structure rather than requiring lateral expansion, thereby reducing the footprint area while maintaining reliable electrical connection to the base substrate

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The contact structure is nested within the existing device architecture by extending through the buried insulating layer that already exists in the FDSOI structure. The contact path is integrated within the vertical stack of the device, utilizing the existing layered structure rather than adding separate lateral contact areas

Inventive Principle:
Principle #7Nested doll (Nesting)

2Ease of manufacture

If the active semiconductor layer is selectively removed to form contact, then direct contact with base semiconductor material is achieved, but device structure complexity increases

Engineering Contradiction:
Improvecontact formationVSAvoidstructure complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The active semiconductor layer is selectively removed in advance at the contact location before final contact formation. This preliminary removal creates a direct pathway to the base semiconductor material, simplifying the subsequent contact formation process by eliminating the need for complex through-layer etching or alternative contact routing

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The active semiconductor layer is extracted or removed from the contact region to create a direct connection path. By taking out the intervening layer at the specific contact location, the structure enables straightforward electrical contact to the base substrate without requiring complex multi-layer penetration techniques

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables increased integration density and efficient back-bias contact formation without adding complexity to the fabrication process, allowing for enhanced performance and reduced leakage current in FDSOI devices.

Implementation Method 1

a contact element of the contact structure extends through the buried insulating material layer and is in electrical contact with the base semiconductor material

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

a gate structure formed on the active semiconductor layer

Methodology Applied
Scientific EffectElectric field: Electric Field

Data Source

PatentUS9425189B1Compact FDSOI device with Bulex contact extending through buried insulating layer adjacent gate structure for back-bias
Publication Date: 2016.08.23 GLOBALFOUNDRIES US INC
  • US9425189B1 patent drawing
  • US9425189B1 patent drawing
  • US9425189B1 patent drawing

AI summary

The present disclosure provides a semiconductor device including an SOI substrate comprising an active semiconductor layer disposed on a buried insulating material layer, which is in turn formed on a base semiconductor material. The semiconductor device further includes a gate structure formed on the active semiconductor layer, source/drain regions provided at opposing sides of the gate structure, and a contact structure having contact elements for contacting the source/drain regions. Herein, the contact elements are disposed at opposing sides of the gate structure and are in alignment therewith. Furthermore, one of the contact elements extends through the buried insulating material layer and is in electrical contact with the base semiconductor material.