FDSOI Raised Source/Drain Facet Height Control
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Solution Overview
Problem
FDSOI technologies face challenges in controlling parasitic capacitance and variability in faceted raised source/drain epi structures due to difficulties in facet height control and wafer-to-wafer and lot-to-lot variability.
Innovation Solution
A process involving multiple spacers is used to control the facet height of raised source/drain epi structures, where a first pair of spacers is formed on a silicon-on-insulator layer, followed by a second pair of spacers more selective to epitaxial growth, allowing for the formation of faceted raised source/drain structures with controlled facets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If faceted epi is used to reduce parasitic capacitance, then parasitic capacitance is reduced, but facet height control becomes difficult
Solution Approach 1:
The patent divides the single spacer structure into multiple spacers (first spacer and second spacer) with different materials and properties. The first spacer provides initial definition while the second spacer controls the final facet height through selective epitaxial growth, enabling precise control of facet height while maintaining low parasitic capacitance.
Solution Approach 2:
Different regions of the spacer structure are assigned different materials and properties. The first spacer uses one material composition while the second spacer uses a different material that is more selective to epitaxial growth. This local differentiation enables the second spacer to precisely control facet height while the first spacer provides structural support.
2Object-affected harmful factors
If faceted epi is used to reduce parasitic capacitance, then parasitic capacitance is reduced, but wafer-to-wafer and lot-to-lot variability increases
Solution Approach 1:
The multi-spacer structure segments the facet formation process into controlled stages. The first spacer establishes a baseline structure while the second spacer provides precise control over the final facet height through selective epitaxial growth. This segmentation reduces variability by decoupling the structural support function from the precise height control function.
Solution Approach 2:
The patent changes material parameters between the first and second spacers, where the second spacer material is specifically selected to be more selective to epitaxial growth. This parameter change enables better control over facet height consistency across wafers and lots, reducing variability while maintaining the low parasitic capacitance benefit.
3Manufacturing precision
If multiple spacers are used to control facet height, then facet height control is improved, but device complexity increases
Solution Approach 1:
The patent segments the spacer formation into two distinct steps with different materials, which increases process complexity but enables precise facet height control. The first spacer provides structural definition while the second spacer controls the final facet morphology through selective epitaxial growth, achieving manufacturing precision that justifies the added process steps.
4Manufacturing precision
If multiple spacers are used to control facet height, then facet height control is improved, but available dopant to diffuse to the channel is reduced
Solution Approach 1:
The multi-spacer structure segments the source/drain region formation, creating controlled facets that reduce the volume of the raised source/drain structures. While this improves facet height control, it also reduces the total amount of dopant available for diffusion to the channel, requiring careful optimization of the spacer dimensions and epitaxial growth parameters.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces parasitic capacitance and variability, enhancing device performance by minimizing overlap capacitance and silicide proximity, thereby improving the consistency and efficiency of FDSOI technology.
Implementation Method 1
forming a second pair of spacers on an upper surface of the first pair of spacers adjacent to and on the opposite sides of the gate structure; and forming a pair of faceted raised source/drain structures on the SOI, each of the faceted source/drain structures faceted at the upper surface of the first pair of spacers, wherein the second pair of spacers is more selective to epitaxial growth than the first pair of spacers
Data Source
AI summary
A method of controlling the facet height of raised source/drain epi structures using multiple spacers, and the resulting device are provided. Embodiments include providing a gate structure on a SOI layer; forming a first pair of spacers on the SOI layer adjacent to and on opposite sides of the gate structure; forming a second pair of spacers on an upper surface of the first pair of spacers adjacent to and on the opposite sides of the gate structure; and forming a pair of faceted raised source/drain structures on the SOI, each of the faceted source/drain structures faceted at the upper surface of the first pair of spacers, wherein the second pair of spacers is more selective to epitaxial growth than the first pair of spacers.