FDTD Simulation for PCB Signal Integrity Analysis
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Accurately measuring timing in electronic packaging systems while considering fluctuations in power and ground rails due to simultaneously switching signals is challenging, especially when large instantaneous changes in current impact voltage levels, making it difficult to predict signal integrity from the chip to the package and across boards.
Innovation Solution
A computer-implemented method using a finite difference time domain (FDTD) simulator for time-domain simulation that links a printed circuit board (PCB) block to a physical layout, allowing for direct simulation of complex layouts without requiring large S-parameter models, enabling effective bus modeling and power-aware signal integrity analysis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional S-parameter models are used for simulation, then the simulation can be performed with established methods, but the simulation suffers from convergence and stability issues when analyzing fast-changing signals and large instantaneous current changes
Solution Approach 1:
The patent changes the fundamental simulation parameters by switching from S-parameter models (frequency-domain) to FDTD simulation (time-domain). This parameter change allows the simulation to handle fast-changing signals and large instantaneous current changes that cause convergence issues in traditional methods, thereby improving simulation reliability for power-aware signal integrity analysis
Solution Approach 2:
The patent substitutes the traditional S-parameter simulation approach with FDTD simulation methodology. This substitution replaces the established but problematic simulation mechanism with a new one that directly solves Maxwell's equations in the time domain, eliminating convergence and stability issues while maintaining the ability to model complex electromagnetic behaviors
2Measurement precision
If detailed physical layouts are simulated to achieve accurate signal integrity analysis, then the measurement precision improves, but the computational complexity and simulation time increase significantly
Solution Approach 1:
The patent performs preliminary actions by pre-defining simulation parameters, material properties, and geometric models before running the FDTD simulation. This preparation work organizes the complex physical layout data into a structured format that the simulator can process efficiently, reducing the actual simulation time while maintaining high measurement precision for timing and signal integrity analysis
Solution Approach 2:
The patent segments the complex physical layout into manageable simulation regions and applies appropriate boundary conditions to each segment. This segmentation allows the large-scale electromagnetic simulation to be divided into smaller computational tasks that can be processed more quickly while still capturing the overall system behavior with high accuracy
Data Source
AI summary
The present disclosure relates to a computer-implemented method for use in an electronic design. Embodiments may include receiving, using at least one processor, an electronic design and linking a printed circuit board (PCB) block to a physical layout associated with the electronic design. Embodiments may further include receiving, at a layout environment, at least one simulation parameter and performing, using a finite difference time domain (“FDTD”) simulator, a time-domain simulation, based upon, at least in part, the at least one simulation parameter.