Full Duplex Cable Modem Filter Switching Synchronization

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Solution Overview

Problem

In cable communication systems like DOCSIS 3.1 FDX, dynamic resource block allocation leads to changes in electrical characteristics, causing filter switching that can result in signal demodulation errors if equalizer coefficients are not updated synchronously, potentially leading to data loss due to inefficient or incorrect coefficient usage.

Innovation Solution

Implementing a method to synchronize filter switching and equalizer coefficient updates by using a filter switch control signal to adjust coefficients in real-time, ensuring accurate compensation for changes in resource block allocations, particularly during transitions from downstream to upstream channels, through a high-speed serial interface and framing structure that marks samples for synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If filter switching is performed to accommodate dynamic resource block allocation changes, then adaptability of the communication system is improved, but receiver performance deteriorates due to signal demodulation errors caused by mismatched equalizer coefficients

Engineering Contradiction:
Improveresource block allocation adaptabilityVSAvoidsignal demodulation accuracy
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies preliminary action by updating equalizer coefficients before or simultaneously with filter switching operations. The system proactively adjusts the equalizer coefficients in response to resource block allocation changes, ensuring that the coefficients are ready and synchronized when the filter switch occurs, thereby preventing signal demodulation errors and maintaining reliable communication.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If equalizer coefficient updates are delayed or not synchronized with filter switching, then device complexity is reduced, but data loss increases due to inefficient or incorrect equalizer usage

Engineering Contradiction:
Improvesynchronization mechanism complexityVSAvoiddata loss
Core Design Contradiction:
Device complexityVSLoss of substance

Solution Approach 1:

The patent implements feedback by monitoring resource block allocation changes and automatically triggering equalizer coefficient updates. The system uses feedback signals from the resource allocation management to detect when filter switching is required, and subsequently updates the equalizer coefficients accordingly, ensuring data integrity without requiring complex manual synchronization mechanisms.

Inventive Principle:
Principle #23Feedback

3Reliability

If synchronous updating of equalizer coefficients with filter switching is implemented, then signal integrity is maintained, but use of energy increases due to real-time coefficient adjustment

Engineering Contradiction:
Improvesignal integrityVSAvoidenergy consumption for coefficient updates
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies periodic action by updating equalizer coefficients only at specific intervals triggered by resource block allocation changes, rather than continuously. The system periodically adjusts coefficients in response to actual network conditions and filter switching events, maintaining signal integrity while minimizing unnecessary energy consumption that would result from continuous updates.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10826635B2Synchronization of adaptive filter switching and channel equalization in full duplex (FDX) cable modems
Publication Date: 2020.11.03 MAXLINEAR INC
  • US10826635B2 patent drawing
  • US10826635B2 patent drawing
  • US10826635B2 patent drawing

AI summary

Synchronizing methods and architectures for cable modems to transmit and receive Full Duplex (FDX) resource block allocations (RBAs) using filter switching and coordinated updating of equalization coefficients. A cable modem including a block of switchable filters, an analog front end (AFE) and a PHY/MAC System on a Chip (SoC) tuner to, at least in part, provide signals to switch the switchable filters in accordance with the RBA changes and synchronize updating tuner equalizations to match filter switching in a coordinated manner by marking received data at the AFE.