Fe-Doped InP Buried Layer for Semiconductor Withstand Voltage

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Solution Overview

Problem

Existing semiconductor photonic device manufacturing methods face challenges in achieving high withstand voltage characteristics due to abnormal growth and degradation of crystallinity caused by excessive Fe concentration in buried layers, which can lead to current leakage.

Innovation Solution

A method involving the growth of a buried layer with a higher Fe concentration on the side surfaces of a semiconductor mesa using an organo-metallic vapor phase epitaxy process, where hydrogen chloride gas is supplied from the beginning of the growth, creating a first region with a (311)B plane and a second region with a lower Fe concentration, thereby suppressing growth rate and maintaining good crystallinity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the Fe concentration in the buried layer is increased to improve withstand voltage characteristics, then the withstand voltage improves, but the crystallinity of the buried layer degrades causing current leakage

Engineering Contradiction:
Improvewithstand voltage characteristicsVSAvoidcrystallinity of the buried layer
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent applies local quality by creating a buried layer with spatially varying Fe concentration. The first region (near the mesa side surface) has high Fe concentration for withstanding voltage, while the second region (farther from the mesa) has lower Fe concentration to maintain good crystallinity. This gradient structure resolves the contradiction by allowing high Fe concentration only where it is most needed for electrical performance while preserving crystallinity in regions where excessive Fe would cause degradation.

Inventive Principle:
Principle #3Local quality

2Reliability

If the Fe concentration in the buried layer is increased to improve withstand voltage characteristics, then the withstand voltage improves, but abnormal growth occurs in the buried layer

Engineering Contradiction:
Improvewithstand voltage characteristicsVSAvoidgrowth uniformity of the buried layer
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent creates a non-uniform Fe distribution in the buried layer where the first region adjacent to the mesa side surface contains high Fe concentration for voltage withstand, while the second region has lower Fe concentration to prevent abnormal growth. This local differentiation allows the buried layer to achieve both high reliability and manufacturing precision by placing high Fe concentration only where electrically critical.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a semiconductor device with improved withstand voltage characteristics and good crystallinity, as the high Fe concentration in the first region enhances voltage withstand while the moderate Fe concentration in the second region prevents abnormal growth and maintains crystallinity.

Implementation Method 1

forming a buried layer on the side surface of the mesa structure and the principal surface of the substrate in a reactor of an organo-metallic vapor phase epitaxy apparatus

Methodology Applied
Scientific EffectVapor phase epitaxy: Epitaxy

Implementation Method 2

in the step of forming the buried layer, the hydrogen chloride gas is supplied from the beginning of forming the buried layer

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS9373939B2Method for manufacturing semiconductor device and the semiconductor device
Publication Date: 2016.06.21 SUMITOMO ELECTRIC INDUSTRIES LTD
  • US9373939B2 patent drawing
  • US9373939B2 patent drawing
  • US9373939B2 patent drawing

AI summary

A method for manufacturing a semiconductor device comprising the steps of: growing a stacked semiconductor layer on a substrate, the stacked semiconductor layer including an active layer and a cladding layer; forming a mesa structure by etching the stacked semiconductor layer, the mesa structure extending in a [011] direction; and forming a buried layer of Fe-doped InP on the side surface of the mesa structure in a reactor of an organo-metallic vapor phase epitaxy apparatus while supplying a hydrogen chloride gas into the reactor. In the step of forming the buried layer, the hydrogen chloride gas is supplied from the beginning of forming the buried layer. The buried layer has a first region and a second region. The first region has a front surface of a (311)B plane. The second region is formed on the front surface. The Fe concentration of the first region is higher than that of the second region.