Feature Placement Error Metrology for Multi-Layer Yield Prediction

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Solution Overview

Problem

Existing semiconductor manufacturing processes face challenges in accurately predicting electrical functionality and yield due to limitations in current metrology measurements, such as Edge Placement Error (EPE), which do not provide comprehensive indicators of actual device performance and are difficult to recalibrate for real-time Advanced Process Control (APC).

Innovation Solution

The implementation of Feature Placement Error (FPE) metrology, which is a two-dimensional measurement incorporating overlay, critical dimension, and critical dimension uniformity, allows for enhanced process control through data-to-database technology, enabling absolute matching with Graphic Data System (GDS) and providing feedback for APC corrections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If Edge Placement Error (EPE) metrology measurements are used, then overlay and critical dimension characterization is achieved, but the measurements do not provide clear indicators of actual electrical characteristics improvement and real-time Advanced Process Control correction is not possible

Engineering Contradiction:
Improveoverlay and critical dimension measurement accuracyVSAvoidprediction of electrical functionality and yield
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent introduces Feature Placement Error (FPE) as an intermediary metric that bridges the gap between traditional overlay/CD measurements and electrical functionality prediction. FPE serves as a mediator that incorporates both overlay and CD information in a unified framework, enabling better correlation with actual device performance and yield while maintaining compatibility with existing metrology systems

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent transforms the measurement parameter from traditional EPE to FPE, which fundamentally changes how placement error is calculated and interpreted. This parameter change enables the measurement to provide meaningful indicators for electrical characteristics and real-time process control, resolving the limitation of EPE measurements

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If traditional overlay and critical dimension measurements are performed separately, then individual process parameters are characterized, but comprehensive process control and yield prediction across multiple layers is difficult

Engineering Contradiction:
Improveindividual process parameter characterizationVSAvoidprocess control across multiple layers
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges overlay measurement and critical dimension measurement into a unified FPE metric. By combining these previously separate measurements, the system achieves comprehensive process control and yield prediction across multiple layers without the complexity of managing separate measurement systems and correlations

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250341810A1Feature placement error (FPE) metrology and correction
Publication Date: 2025.11.06 KLA CORP
  • US20250341810A1 patent drawing
  • US20250341810A1 patent drawing
  • US20250341810A1 patent drawing

AI summary

A system and method for measuring a sample is disclosed. The system may include a metrology sub-system and a controller. The controller may be communicatively coupled to the metrology sub-system and may include one or more processors. The processors may be configured to execute program instructions causing the processors to acquire one or more images of features of a sample, acquire sample design data corresponding to the features of the sample, and determine one or more feature placement error (FPE) measurements based on calculated areas of nonoverlap between shapes of the features in the one or more images and shapes of the features in the sample design data.