FEC Code Block Encoding Without 64B/66B Transcoding Delay
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Solution Overview
Problem
Current encoding and decoding processes in communication technologies, such as those used in high-speed physical links, incur unnecessary delays, power consumption, and chip area occupation due to the requirement for 64B/66B encoding and transcoding, which are not essential for data protection when using forward error correction (FEC) encoding.
Innovation Solution
An encoding method that eliminates the need for 64B/66B encoding on each group of code stream blocks by performing first encoding on 2n groups to obtain a target code block, which includes a data unit and type determined by control blocks, and a decoding method that directly obtains 2n groups of code stream blocks from the target code block without transcoding, thereby improving efficiency and reducing resource utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If 64B/66B encoding and transcoding are performed on each group of code stream blocks, then data protection function is provided, but encoding delay, power consumption, and chip area occupation increase
Solution Approach 1:
The patent merges multiple 66-bit code blocks into a single 257-bit code block before FEC encoding. Instead of encoding each 64B/66B block separately, the method combines 2n groups of code stream blocks into one target code block, reducing the number of encoding operations and eliminating unnecessary transcoding steps, thereby reducing encoding delay while maintaining data protection
Solution Approach 2:
The patent creates a universal encoding framework where the same FEC encoding process can handle both traditional 64B/66B encoded data and new direct-encoded data. The method provides multi-functionality by supporting both encoding modes (with and without 64B/66B encoding) through a unified interface, allowing system flexibility without requiring separate processing paths
2Reliability
If 64B/66B encoding and transcoding are performed on each group of code stream blocks, then data protection function is provided, but power consumption increases
Solution Approach 1:
The patent merges multiple 66-bit code blocks into a single 257-bit code block before FEC encoding. Instead of encoding each 64B/66B block separately, the method combines 2n groups of code stream blocks into one target code block, reducing the number of encoding operations and eliminating unnecessary transcoding steps, thereby reducing power consumption while maintaining data protection
Solution Approach 2:
The patent extracts and eliminates the unnecessary 64B/66B encoding and transcoding steps from the data processing pipeline. By removing these redundant operations that do not contribute to data protection when FEC is used, the method significantly reduces power consumption while preserving the essential FEC encoding function
3Reliability
If 64B/66B encoding and transcoding are performed on each group of code stream blocks, then data protection function is provided, but chip area occupation increases
Solution Approach 1:
The patent merges multiple 66-bit code blocks into a single 257-bit code block before FEC encoding. Instead of encoding each 64B/66B block separately, the method combines 2n groups of code stream blocks into one target code block, reducing the number of encoding operations and eliminating unnecessary transcoding steps, thereby reducing chip area occupation while maintaining data protection
Solution Approach 2:
The patent extracts and eliminates the unnecessary 64B/66B encoding and transcoding steps from the data processing pipeline. By removing these redundant operations that do not contribute to data protection when FEC is used, the method significantly reduces chip area occupation while preserving the essential FEC encoding function
4Adaptability or versatility
If 64B/66B encoding is performed on each group of code stream blocks, then compatibility with existing protocols is maintained, but encoding efficiency decreases
Solution Approach 1:
The patent introduces dynamic adaptability by allowing the system to operate in multiple modes: traditional 64B/66B encoding mode for compatibility, and new direct encoding mode for efficiency. The encoding apparatus can dynamically select the appropriate mode based on system requirements, providing both protocol compatibility and encoding efficiency without being constrained to a single approach
Data Source
AI summary
This application discloses an encoding method, a decoding method, an apparatus, a device, a system, and a readable storage medium. The encoding method includes: obtaining 2n groups of code stream blocks including control blocks and data blocks; and performing first encoding on the 2n groups of code stream blocks to obtain a target code block, where the target code block includes a data unit and a type that is determined based on the control blocks in the 2n groups of code stream blocks, and the data unit is obtained by performing the first encoding on the data blocks included in the 2n groups of code stream blocks in an encoding manner determined based on the control blocks and the data blocks in the 2n groups of code stream blocks.