FEC Decoder Memory Reduction Through Error-Free Data Extraction
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Solution Overview
Problem
The existing integrated circuits for multi-protocol encapsulation forward error correction (MPE-FEC) require significant memory to store large MPE-FEC frames, which increases size and cost, particularly in mobile devices where battery life, size, and cost are critical considerations.
Innovation Solution
The proposed integrated circuit and method reduce memory requirements by transmitting error-free application data immediately to the host application process without storing it in the FEC module, allowing for reduced memory needs and enabling efficient error correction without storing entire MPE-FEC frames, thereby minimizing the IC's size and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MPE-FEC frames are stored in memory for error correction processing, then error correction capability is improved, but memory size and cost increase
Solution Approach 1:
The patent segments the MPE-FEC frame processing into two distinct parts: error-free data segments and error-containing data segments. The error-free segments are identified and extracted immediately upon receipt, while only the error-containing segments are stored in memory for subsequent error correction processing. This segmentation allows the system to maintain error correction capability while significantly reducing the amount of data that needs to be stored in memory.
Solution Approach 2:
The patent extracts and removes the error-free data segments from the MPE-FEC frame immediately after reception, before storing the frame in memory. By taking out the portions of data that do not require error correction processing, the system reduces memory requirements while preserving the ability to correct errors in the remaining data segments. This extraction principle directly addresses the contradiction by separating useful data from data requiring processing.
2Reliability
If entire MPE-FEC frames are stored for error correction, then complete error correction is achieved, but device size and cost increase
Solution Approach 1:
The patent divides the MPE-FEC frame into segments based on error status, identifying which segments contain errors and which are error-free. Only the error-containing segments are retained for memory storage and correction processing, while error-free segments are immediately transmitted to the host application process. This segmentation approach ensures complete error correction for affected segments while minimizing device size by avoiding storage of unnecessary data.
Solution Approach 2:
The patent extracts error-free data segments from the complete MPE-FEC frame and immediately forwards them to the host application process, removing them from the memory storage requirement. This extraction ensures that only the necessary portions of data (those containing errors) occupy device memory, thereby achieving complete error correction where needed while reducing overall device size.
3Manufacturing precision
If large MPE-FEC frames are buffered in the FEC module, then error correction accuracy is improved, but manufacturing cost increases
Solution Approach 1:
The patent segments the buffering requirement by identifying and separating error-free segments from error-containing segments within the MPE-FEC frame. The error-free segments require no buffering and can be immediately processed, while only the error-containing segments are buffered for accurate error correction. This segmentation maintains error correction accuracy for necessary data while reducing the overall buffering capacity required, thereby lowering manufacturing costs.
Solution Approach 2:
The patent extracts and immediately processes error-free data segments, removing them from the buffering requirement. By taking out the portions of data that do not require error correction, the system reduces the total buffer size needed in the FEC module, which directly reduces manufacturing complexity and cost while preserving error correction accuracy for the remaining error-containing segments.
4Reliability
If full MPE-FEC frame memory is allocated, then all data can be corrected, but battery consumption increases
Solution Approach 1:
The patent segments the MPE-FEC frame processing to identify and immediately transmit error-free segments without storing them in memory. Only the error-containing segments are allocated memory for correction processing. This segmentation reduces the overall memory activity and data processing load, thereby reducing battery consumption while maintaining the capability to recover all lost data through correction of the error-containing segments.
Solution Approach 2:
The patent extracts error-free data segments from the MPE-FEC frame and immediately forwards them to the host application process, eliminating the need to store and repeatedly access this data in memory. By taking out the error-free portions, the system reduces memory write/read operations and processing overhead, which directly reduces battery consumption while preserving complete data recovery capability through error correction of the remaining segments.
Data Source
AI summary
An integrated circuit comprises forward error correction (FEC) decoder logic being coupled to memory and arranged to receive data, comprising application data, from a host application process. The FEC decoder logic performs error detection upon the received data. Logic is further arranged to transmit error free application data back to the host application process prior to performing error correction; and store in memory only application data in which errors are detected.