FEC Error Emulation for Accurate Post-FEC BER Prediction
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Solution Overview
Problem
Conventional Bit Error Rate Testers (BERTs) struggle to accurately predict the post-FEC Bit Error Ratio (BER) for new Ethernet standards using GF10 Reed-Solomon FEC codes, as they rely on pseudo-random binary sequences and do not support the generation of FEC encoded data, failing to account for error distribution and burstiness.
Innovation Solution
The development of an emulator that groups errors into Reed-Solomon FEC symbols and codewords to determine correctable errors, providing a more accurate representation of post-FEC BER by emulating the error correction capabilities of FEC codes, which can be used standalone or in conjunction with BERTs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional BERTs use PRBS patterns for error detection, then the measurement process is simple, but the post-FEC BER prediction accuracy deteriorates because they cannot account for error distribution and burstiness characteristics
Solution Approach 1:
The patent introduces an error pattern analyzer as an intermediary component between the BERT and the FEC decoder. This analyzer examines the distribution and characteristics of errors in the received data before FEC correction, providing insights into error burstiness and patterns that simple BER counting cannot capture. The analyzer acts as a mediator that bridges the gap between raw error detection and accurate post-FEC BER prediction.
Solution Approach 2:
The patent segments the error analysis process into multiple components: (1) PRBS pattern generation and transmission, (2) error detection and counting, (3) error pattern analysis to identify burstiness and distribution characteristics, and (4) post-FEC BER calculation based on segmented error types. This segmentation allows each component to be optimized independently while improving overall measurement accuracy.
2Reliability
If FEC codes are used to improve BER performance, then the reliability of data transmission is improved, but the device complexity increases due to the need for additional encoding and decoding operations
Solution Approach 1:
The patent applies preliminary PRBS encoding to the test data before transmission through the communication channel. This preliminary encoding establishes a known reference pattern that enables accurate error detection and analysis. By preparing the data in advance with a predictable pattern, the system can more effectively measure and analyze FEC performance without adding unnecessary complexity during the measurement process.
Solution Approach 2:
The patent generates a copy of the transmitted PRBS pattern at the receiver side for comparison with the received data. This copied reference pattern enables precise error detection by comparing each received bit against the expected value from the original pattern. The copying approach simplifies error identification compared to more complex error correction algorithms.
3Productivity
If simple BER counting is used in BERTs, then the measurement process is fast and simple, but it fails to capture the burstiness and distribution characteristics of errors that affect FEC performance
Solution Approach 1:
The patent implements a dynamic error analysis approach that adapts to different error patterns observed in the received data. The error pattern analyzer dynamically identifies whether errors are random or bursty, and adjusts the analysis methodology accordingly. This dynamic approach maintains measurement speed while capturing essential error characteristics that static BER counting cannot provide.
Solution Approach 2:
The patent replaces the simple mechanical BER counting mechanism with a more sophisticated error pattern analysis system that uses logical and statistical methods to characterize errors. Instead of merely counting erroneous bits, the system analyzes error distributions, identifies burst patterns, and calculates metrics that reflect the true impact on FEC performance, substituting simple arithmetic with more informative analytical methods.
Data Source
AI summary
Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).