FEC Error Location Feedback for Demodulator Control
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Solution Overview
Problem
Multi-level modulation schemes in communication systems require complex receiver designs for dynamic control of demodulation blocks, which are indirectly related to Bit Error Rate (BER), leading to coarse accuracy and susceptibility to errors due to multiple distortion effects, especially during start-up conditions where parameters may be far from optimum, making it difficult to achieve FEC frame locking.
Innovation Solution
Utilizing corrected forward error correction (FEC) error location identifiers to provide precise error correction information for each FEC block, allowing for direct feedback to control the demodulator and adjust receiver thresholds and parameters to achieve and maintain error-free operation quickly, by tracing error locations to specific sub-rate signal paths and performing running post-FEC corrected BER calculations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If indirect optical, RF, or power monitoring schemes are used for dynamic control of demodulation blocks, then the control system can operate without direct BER measurement, but the measurement precision is coarse and the system is susceptible to errors from multiple distortion effects
Solution Approach 1:
The patent implements a feedback mechanism where the FEC decoder provides corrected error location identifiers back to the controller, which then adjusts demodulation block parameters. This closed-loop feedback enables direct BER-based control, achieving both ease of operation and high measurement precision by continuously monitoring and adjusting based on actual error rates.
Solution Approach 2:
The patent replaces indirect mechanical/optical/RF monitoring schemes with a digital information-based control system. Instead of measuring physical properties like optical power or RF spectrum shape, the system uses digital error location identifiers from FEC decoding to directly measure and control BER, substituting physical measurement with information processing.
2Reliability
If FEC encoding is performed on the full bit rate signal before splitting into sub-rate streams, then error correction can be applied to the complete signal, but the device complexity increases due to the need to process and trace error locations through multiple signal paths
Solution Approach 1:
The patent segments the full bit rate signal into multiple sub-rate streams for parallel processing, while maintaining FEC encoding on the complete signal. The error location identifiers are then segmented and assigned to corresponding sub-rate streams, allowing distributed error correction processing that reduces the complexity burden on any single processing element while maintaining overall reliability.
Solution Approach 2:
The patent introduces an intermediary mapping mechanism that connects error location identifiers from the FEC decoder to specific sub-rate signal paths. This intermediary structure enables the system to track and correct errors across the complex multi-path signal processing architecture without requiring direct complex processing at each stage, thus managing device complexity while preserving error correction capability.
Data Source
AI summary
The present invention provides systems and methods for communication system control utilizing corrected forward error correction (FEC) error location identifiers in multi-level modulation scheme systems. The present invention utilizes precise error correction information, available for each FEC block of a particular code (including, but not limited to, block codes and concatenated block codes employing iterative decoding as well as convolutional codes (including turbo codes) and low-density parity-check code (LDPC) class codes) used (e.g., Bose, Ray-Chaudhuri, Hocquenghem (BCH), Reed-Solomon, etc.), as a result of the FEC decoding process to provide feedback to close the loop for control of a demodulator (i.e., receiver). Each error location can be uniquely traced back to a particular sub-rate signal path, with running, post-FEC corrected BER (bit error rate) calculations generated on each sub-rate signal. Advantageously, this provides the ability to adjust thresholds and various other parameters to achieve and maintain error-free operation quickly.