FEC Flag Synchronization for Ethernet Wake-Up Timing
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Solution Overview
Problem
The existing FEC synchronization process in Ethernet systems takes too long, particularly in energy-efficient Ethernet, where it exceeds the limited wake window, degrading performance by taking up to 446 microseconds to achieve synchronization, which is not suitable for devices transitioning from a low-power idle state to full operational state within a 10-microsecond wake window.
Innovation Solution
The method involves transmitting an FEC flag character followed by an FEC block after a predetermined first period, allowing immediate synchronization by indicating a known boundary condition, thereby reducing synchronization time to less than 100 microseconds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional FEC synchronization is used, then FEC error correction is achieved, but synchronization time is too long (up to 446 microseconds)
Solution Approach 1:
The patent applies preliminary action by transmitting an FEC flag character before the actual FEC data block to pre-indicate the boundary condition. This allows the receiver to prepare for and immediately recognize the start of an FEC block, eliminating the need for lengthy synchronization searches and reducing sync time from 446 microseconds to under 100 microseconds while maintaining FEC error correction capability
2Loss of energy
If FEC is shut off to save power in low-power idle state, then energy efficiency is improved, but synchronization time exceeds the wake window (10 microseconds)
Solution Approach 1:
The FEC flag character serves as a preliminary indicator that alerts the receiver to wake up and prepare for incoming FEC data. This pre-notification mechanism enables the receiver to synchronize within the 10-microsecond wake window constraint, allowing energy-efficient Ethernet to shut off FEC during idle states while still meeting wake-up timing requirements
3Device complexity
If FEC synchronization is performed without a flag character, then device complexity is reduced, but synchronization speed is too slow for energy-efficient Ethernet
Solution Approach 1:
The FEC flag character acts as an intermediary element between the data stream and the synchronization process. This simple marker character provides explicit boundary information without requiring complex synchronization algorithms, enabling fast synchronization (under 100 microseconds) while maintaining relatively simple device implementation
Data Source
AI summary
A system and method are provided for accelerating forward error correction (FEC) synchronization in a communicating receiver. On the transmitter side, the method accepts an energy waveform representing a packet of data symbols, encodes the packet, and creates an FEC block. Prior to transmitting the FEC block, an electromagnetic waveform is transmitted representing an FEC flag character. Then, an electromagnetic waveform representing the FEC block is transmitted a predetermined first period of time after the transmission of the FEC flag character. For example, the first time period may be immediately following the FEC flag character transmission or a predetermined number of idle characters following the transmission of the FEC flag character.